From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 91D492E36FA for ; Wed, 23 Jul 2025 00:20:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753230013; cv=none; b=iqrP3pMPbztK3ElLIe3Hrq8JbS7BMHZp30OcM1Waz+Jqn1+ejgbF9Xr/BUbg3k9OAoHrtrumb82vK2HG0NAX+SfthAG/hzGxdPursQ/IiNK20ltbA4Rjx5q6NokV29UmMymiqHAixKX7VNGv/RzZxO9O3jofByDKXvjI1EE8Iq0= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753230013; c=relaxed/simple; bh=EHQs0Ou9KaWSEqWRQr+x17JpEwid1yL333gxcpcyG6c=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=nWNgo3VDJqLh0RKl1Nq96qM0PqIijFtcg4LEIOEwu+tK5yJGXr4z0QvAYpmtMW0QSlkxiGADp1O2X7P/LKrHvyNjG1MMOg0ntn+/mzdfriqtCYQ39594/6Rgws+nipk+JdulRGTtqzlOSMfjsEtfHxvU6zeZohq2DUulpMwvsr0= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=VDtBbS2V; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="VDtBbS2V" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 26796C4CEF5; Wed, 23 Jul 2025 00:20:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1753230013; bh=EHQs0Ou9KaWSEqWRQr+x17JpEwid1yL333gxcpcyG6c=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=VDtBbS2V+8uU9rPVMkTw/dHCS1QO7OHhSO/ti9Cq/BydsYzOpVaeIOFdcJlCXSyD0 qWZdJTsCrg7uh+fCoPnCFCuj4CAmTPJT/4kR2h2QL1phVM3qVT4WhNkle0huBV1Nsj AIRF0FYdPENyW5V/wFWSoIk3sPCRotzsyZi7YV9YFAYRHXnZB7HpAHXLCV3No6kfZO 6z5MNnMvkpL81eJexeUEhSJW537SAg04ttNctftnhzGna+qXBXEdC1klTo9k+d1DqW Di8mJgns/y04iSL9dLe4pCQwbPu9LlDXi73Dc3zM4nGOTgawEPBH4rBBfFFJCxhgt9 /g9w9kBtsLqTQ== From: Sasha Levin To: stable@vger.kernel.org Cc: =?UTF-8?q?Cl=C3=A9ment=20Le=20Goffic?= , Alain Volmat , Andi Shyti , Sasha Levin Subject: [PATCH 6.6.y 6/6] i2c: stm32f7: unmap DMA mapped buffer Date: Tue, 22 Jul 2025 20:19:42 -0400 Message-Id: <20250723001942.1010722-6-sashal@kernel.org> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250723001942.1010722-1-sashal@kernel.org> References: <2025072104-bacteria-resend-dcff@gregkh> <20250723001942.1010722-1-sashal@kernel.org> Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Clément Le Goffic [ Upstream commit 6aae87fe7f180cd93a74466cdb6cf2aa9bb28798 ] Before each I2C transfer using DMA, the I2C buffer is DMA'pped to make sure the memory buffer is DMA'able. This is handle in the function `stm32_i2c_prep_dma_xfer()`. If the transfer fails for any reason the I2C buffer must be unmap. Use the dma_callback to factorize the code and fix this issue. Note that the `stm32f7_i2c_dma_callback()` is now called in case of DMA transfer success and error and that the `complete()` on the dma_complete completion structure is done inconditionnally in case of transfer success or error as well as the `dmaengine_terminate_async()`. This is allowed as a `complete()` in case transfer error has no effect as well as a `dmaengine_terminate_async()` on a transfer success. Also fix the unneeded cast and remove not more needed variables. Fixes: 7ecc8cfde553 ("i2c: i2c-stm32f7: Add DMA support") Signed-off-by: Clément Le Goffic Cc: # v4.18+ Acked-by: Alain Volmat Signed-off-by: Andi Shyti Link: https://lore.kernel.org/r/20250704-i2c-upstream-v4-2-84a095a2c728@foss.st.com Signed-off-by: Sasha Levin --- drivers/i2c/busses/i2c-stm32f7.c | 20 +++++++------------- 1 file changed, 7 insertions(+), 13 deletions(-) diff --git a/drivers/i2c/busses/i2c-stm32f7.c b/drivers/i2c/busses/i2c-stm32f7.c index cc76c71666e5d..956803ba6c1e1 100644 --- a/drivers/i2c/busses/i2c-stm32f7.c +++ b/drivers/i2c/busses/i2c-stm32f7.c @@ -726,10 +726,11 @@ static void stm32f7_i2c_disable_dma_req(struct stm32f7_i2c_dev *i2c_dev) static void stm32f7_i2c_dma_callback(void *arg) { - struct stm32f7_i2c_dev *i2c_dev = (struct stm32f7_i2c_dev *)arg; + struct stm32f7_i2c_dev *i2c_dev = arg; struct stm32_i2c_dma *dma = i2c_dev->dma; stm32f7_i2c_disable_dma_req(i2c_dev); + dmaengine_terminate_async(dma->chan_using); dma_unmap_single(i2c_dev->dev, dma->dma_buf, dma->dma_len, dma->dma_data_dir); complete(&dma->dma_complete); @@ -1525,7 +1526,6 @@ static irqreturn_t stm32f7_i2c_isr_event_thread(int irq, void *data) { struct stm32f7_i2c_dev *i2c_dev = data; struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg; - struct stm32_i2c_dma *dma = i2c_dev->dma; void __iomem *base = i2c_dev->base; u32 status, mask; int ret; @@ -1540,10 +1540,8 @@ static irqreturn_t stm32f7_i2c_isr_event_thread(int irq, void *data) dev_dbg(i2c_dev->dev, "<%s>: Receive NACK (addr %x)\n", __func__, f7_msg->addr); writel_relaxed(STM32F7_I2C_ICR_NACKCF, base + STM32F7_I2C_ICR); - if (i2c_dev->use_dma) { - stm32f7_i2c_disable_dma_req(i2c_dev); - dmaengine_terminate_async(dma->chan_using); - } + if (i2c_dev->use_dma) + stm32f7_i2c_dma_callback(i2c_dev); f7_msg->result = -ENXIO; } @@ -1561,8 +1559,7 @@ static irqreturn_t stm32f7_i2c_isr_event_thread(int irq, void *data) ret = wait_for_completion_timeout(&i2c_dev->dma->dma_complete, HZ); if (!ret) { dev_dbg(i2c_dev->dev, "<%s>: Timed out\n", __func__); - stm32f7_i2c_disable_dma_req(i2c_dev); - dmaengine_terminate_async(dma->chan_using); + stm32f7_i2c_dma_callback(i2c_dev); f7_msg->result = -ETIMEDOUT; } } @@ -1604,7 +1601,6 @@ static irqreturn_t stm32f7_i2c_isr_error_thread(int irq, void *data) u16 addr = f7_msg->addr; void __iomem *base = i2c_dev->base; struct device *dev = i2c_dev->dev; - struct stm32_i2c_dma *dma = i2c_dev->dma; u32 status; status = readl_relaxed(i2c_dev->base + STM32F7_I2C_ISR); @@ -1648,10 +1644,8 @@ static irqreturn_t stm32f7_i2c_isr_error_thread(int irq, void *data) } /* Disable dma */ - if (i2c_dev->use_dma) { - stm32f7_i2c_disable_dma_req(i2c_dev); - dmaengine_terminate_async(dma->chan_using); - } + if (i2c_dev->use_dma) + stm32f7_i2c_dma_callback(i2c_dev); i2c_dev->master_mode = false; complete(&i2c_dev->complete); -- 2.39.5