[PATCH AUTOSEL 6.16-5.4] net: phy: smsc: add proper reset flags for LAN8710A

[Sasha Levin <sashal@kernel.org>]

From: Buday Csaba <buday.csaba@prolan.hu>

[ Upstream commit 57ec5a8735dc5dccd1ee68afdb1114956a3fce0d ]

According to the LAN8710A datasheet (Rev. B, section 3.8.5.1), a hardware
reset is required after power-on, and the reference clock (REF_CLK) must be
established before asserting reset.

Signed-off-by: Buday Csaba <buday.csaba@prolan.hu>
Cc: Csókás Bence <csokas.bence@prolan.hu>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://patch.msgid.link/20250728152916.46249-2-csokas.bence@prolan.hu
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---

LLM Generated explanations, may be completely bogus:

**YES**

This commit should be backported to stable kernel trees for the
following reasons:

1. **Hardware Requirement Fix**: The commit addresses a documented
   hardware requirement from the LAN8710A datasheet (section 3.8.5.1)
   that specifies a hardware reset is required after power-on with the
   reference clock established before asserting reset. This is fixing
   incorrect hardware initialization that could lead to device
   malfunction.

2. **Regression Fix**: Looking at the git history, the
   `PHY_RST_AFTER_CLK_EN` flag was:
   - Originally added in commit 7f64e5b18ebb (2017) for LAN8710/20 based
     on datasheet requirements
   - Removed in commit d65af21842f8 (2020) when refclk support was
     added, with the assumption that the refclk mechanism would handle
     the reset
   - Still present for LAN8740 (added in commit 76db2d466f6a in 2019)

   The removal in 2020 appears to have been premature, as it relied on
optional clock provider support that may not be configured in all
systems. This commit re-adds the flag specifically for LAN8710A,
restoring proper hardware initialization.

3. **Minimal and Contained Change**: The fix is a single-line addition
   of the `PHY_RST_AFTER_CLK_EN` flag to the driver structure for the
   LAN8710/LAN8720 PHY entry. This flag is already used by other PHYs in
   the same driver (LAN8740) and has well-established kernel
   infrastructure to handle it properly through
   `phy_reset_after_clk_enable()`.

4. **Bug Fix Nature**: This fixes a real hardware initialization issue
   that could cause the PHY to not work properly if the reference clock
   timing requirements aren't met. Systems without proper clock provider
   configuration would experience PHY initialization failures.

5. **Low Risk**: The change only affects the specific PHY model
   (LAN8710/LAN8720) and uses an existing, well-tested mechanism
   (`PHY_RST_AFTER_CLK_EN` flag). The flag is already successfully used
   by LAN8740 in the same driver, demonstrating its safety and
   effectiveness.

6. **Clear Problem Statement**: The commit message clearly documents the
   hardware requirement from the datasheet, making it evident this is
   fixing a specification compliance issue rather than adding a new
   feature.

The commit meets stable kernel criteria as it fixes a hardware
initialization bug with minimal risk and a very contained change scope.

 drivers/net/phy/smsc.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/phy/smsc.c b/drivers/net/phy/smsc.c
index b6489da5cfcd..48487149c225 100644
--- a/drivers/net/phy/smsc.c
+++ b/drivers/net/phy/smsc.c
@@ -785,6 +785,7 @@ static struct phy_driver smsc_phy_driver[] = {
 
 	/* PHY_BASIC_FEATURES */
 
+	.flags		= PHY_RST_AFTER_CLK_EN,
 	.probe		= smsc_phy_probe,
 
 	/* basic functions */
-- 
2.39.5