From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 43ADF210FB for ; Mon, 8 Sep 2025 21:06:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757365564; cv=none; b=jstygd1mZ3GquHRy/3wJ9vqPVQ09J6HwopbDMKKpXFcW0UPzxagH+WZDVN1LCoesR89Un2AuVYwHw0TfwYk/2AtbbaZTTKvFPanDBex+Jd0ffvJ6VSM3BYHXwoOhP9pku5PiQelw8iC8IwZw5jHQankI+ieNr9AA/eKJjhntuBA= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757365564; c=relaxed/simple; bh=wBD+50DrWX1uXxTvaD4c9zWh0BXIk6MAbZ6ZuQOIHUo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=k/dna2SHH6M1fH9IfiWSX0joK4341ns8Dq5RFBVeiMlwiPceLkekl/FuUHQl40yu4u29LFxWo9F4pp0qbttETjImPybLbbXh/tus09PwVdFub+Qpi/rCWW7CedyeOtTFCC9dQfZsH+cVp4XhBllCwnFhojGK0oUu2V/Dvo5+sBQ= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=sSG3ujFK; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="sSG3ujFK" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 37863C4CEF1; Mon, 8 Sep 2025 21:06:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1757365563; bh=wBD+50DrWX1uXxTvaD4c9zWh0BXIk6MAbZ6ZuQOIHUo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=sSG3ujFKBLjtoDo3074egF3dO/QMMsJ5PjZCvZ/J5hej1B1wD42+atvSoJtP6onPW pZ2sp7hGNEFtd4tK7lfZpvGQ2kEBO0wFAUfhXZnRAU4TrEg+c7DOtO5EZGdSFkkuIa 7yYOiNFxAqB+7hZUv7jM+n7w7vWz6pV2s8EEKW4nJzDv6GG8IB7yo5Bz1UV/w38f+P ErLrdtsEbWNWbzlreq49nLbeS8guvMbBhmVBFaB7Yq+NF9yaIj0yaK33RuHJRFej9O adO+xZL3V6dlPBJ5sukYT8OOtuKvd4EL2W8JkObDfETY7BHSk8PSauokelES/dNbwk 0QxBu/jxJ/IAg== From: Sasha Levin To: stable@vger.kernel.org Cc: =?UTF-8?q?Andr=C3=A9=20Apitzsch?= , Ricardo Ribalda , Sakari Ailus , Hans Verkuil , Sasha Levin Subject: [PATCH 5.10.y] media: i2c: imx214: Fix link frequency validation Date: Mon, 8 Sep 2025 17:06:01 -0400 Message-ID: <20250908210601.2345440-1-sashal@kernel.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <2025041717-tapestry-degrading-b2ed@gregkh> References: <2025041717-tapestry-degrading-b2ed@gregkh> Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: André Apitzsch [ Upstream commit acc294519f1749041e1b8c74d46bbf6c57d8b061 ] The driver defines IMX214_DEFAULT_LINK_FREQ 480000000, and then IMX214_DEFAULT_PIXEL_RATE ((IMX214_DEFAULT_LINK_FREQ * 8LL) / 10), which works out as 384MPix/s. (The 8 is 4 lanes and DDR.) Parsing the PLL registers with the defined 24MHz input. We're in single PLL mode, so MIPI frequency is directly linked to pixel rate. VTCK ends up being 1200MHz, and VTPXCK and OPPXCK both are 120MHz. Section 5.3 "Frame rate calculation formula" says "Pixel rate [pixels/s] = VTPXCK [MHz] * 4", so 120 * 4 = 480MPix/s, which basically agrees with my number above. 3.1.4. MIPI global timing setting says "Output bitrate = OPPXCK * reg 0x113[7:0]", so 120MHz * 10, or 1200Mbit/s. That would be a link frequency of 600MHz due to DDR. That also matches to 480MPix/s * 10bpp / 4 lanes / 2 for DDR. Keep the previous link frequency for backward compatibility. Acked-by: Ricardo Ribalda Signed-off-by: André Apitzsch Fixes: 436190596241 ("media: imx214: Add imx214 camera sensor driver") Cc: stable@vger.kernel.org Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil [ changed dev_err() to dev_err_probe() for the final error case ] Signed-off-by: Sasha Levin --- drivers/media/i2c/imx214.c | 27 +++++++++++++++++++-------- 1 file changed, 19 insertions(+), 8 deletions(-) diff --git a/drivers/media/i2c/imx214.c b/drivers/media/i2c/imx214.c index cee1a4817af99..9df760f1f6994 100644 --- a/drivers/media/i2c/imx214.c +++ b/drivers/media/i2c/imx214.c @@ -20,7 +20,9 @@ #include #define IMX214_DEFAULT_CLK_FREQ 24000000 -#define IMX214_DEFAULT_LINK_FREQ 480000000 +#define IMX214_DEFAULT_LINK_FREQ 600000000 +/* Keep wrong link frequency for backward compatibility */ +#define IMX214_DEFAULT_LINK_FREQ_LEGACY 480000000 #define IMX214_DEFAULT_PIXEL_RATE ((IMX214_DEFAULT_LINK_FREQ * 8LL) / 10) #define IMX214_FPS 30 #define IMX214_MBUS_CODE MEDIA_BUS_FMT_SRGGB10_1X10 @@ -891,17 +893,26 @@ static int imx214_parse_fwnode(struct device *dev) goto done; } - for (i = 0; i < bus_cfg.nr_of_link_frequencies; i++) + if (bus_cfg.nr_of_link_frequencies != 1) + dev_warn(dev, "Only one link-frequency supported, please review your DT. Continuing anyway\n"); + + for (i = 0; i < bus_cfg.nr_of_link_frequencies; i++) { if (bus_cfg.link_frequencies[i] == IMX214_DEFAULT_LINK_FREQ) break; - - if (i == bus_cfg.nr_of_link_frequencies) { - dev_err(dev, "link-frequencies %d not supported, Please review your DT\n", - IMX214_DEFAULT_LINK_FREQ); - ret = -EINVAL; - goto done; + if (bus_cfg.link_frequencies[i] == + IMX214_DEFAULT_LINK_FREQ_LEGACY) { + dev_warn(dev, + "link-frequencies %d not supported, please review your DT. Continuing anyway\n", + IMX214_DEFAULT_LINK_FREQ); + break; + } } + if (i == bus_cfg.nr_of_link_frequencies) + ret = dev_err_probe(dev, -EINVAL, + "link-frequencies %d not supported, please review your DT\n", + IMX214_DEFAULT_LINK_FREQ); + done: v4l2_fwnode_endpoint_free(&bus_cfg); fwnode_handle_put(endpoint); -- 2.51.0