From: Niklas Cassel <cassel@kernel.org>
To: "Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
"Manivannan Sadhasivam" <mani@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Thierry Reding" <thierry.reding@gmail.com>,
"Jonathan Hunter" <jonathanh@nvidia.com>,
"Vidya Sagar" <vidyas@nvidia.com>
Cc: Shin'ichiro Kawasaki <shinichiro.kawasaki@wdc.com>,
Niklas Cassel <cassel@kernel.org>,
stable@vger.kernel.org, Thierry Reding <treding@nvidia.com>,
linux-pci@vger.kernel.org, linux-tegra@vger.kernel.org
Subject: [PATCH v2 1/3] PCI: tegra194: Fix broken tegra_pcie_ep_raise_msi_irq()
Date: Mon, 22 Sep 2025 16:08:24 +0200 [thread overview]
Message-ID: <20250922140822.519796-6-cassel@kernel.org> (raw)
In-Reply-To: <20250922140822.519796-5-cassel@kernel.org>
The pci_epc_raise_irq() supplies a MSI or MSI-X interrupt number in range
(1-N), see kdoc for pci_epc_raise_irq().
Thus, for MSI pci_epc_raise_irq() will supply interrupt number 1-32.
Convert the interrupt number to an MSI vector.
With this, the PCI endpoint kselftest test case MSI_TEST passes.
Also, set msi_capable to true, as the driver obviously supports MSI.
This helps pci_endpoint_test to use the optimal IRQ type when using
PCITEST_IRQ_TYPE_AUTO.
Cc: stable@vger.kernel.org
Fixes: c57247f940e8 ("PCI: tegra: Add support for PCIe endpoint mode in Tegra194")
Signed-off-by: Niklas Cassel <cassel@kernel.org>
---
drivers/pci/controller/dwc/pcie-tegra194.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
index 7c295ec6f0f16..63d310e5335f4 100644
--- a/drivers/pci/controller/dwc/pcie-tegra194.c
+++ b/drivers/pci/controller/dwc/pcie-tegra194.c
@@ -1969,10 +1969,10 @@ static int tegra_pcie_ep_raise_intx_irq(struct tegra_pcie_dw *pcie, u16 irq)
static int tegra_pcie_ep_raise_msi_irq(struct tegra_pcie_dw *pcie, u16 irq)
{
- if (unlikely(irq > 31))
+ if (unlikely(irq > 32))
return -EINVAL;
- appl_writel(pcie, BIT(irq), APPL_MSI_CTRL_1);
+ appl_writel(pcie, BIT(irq - 1), APPL_MSI_CTRL_1);
return 0;
}
@@ -2012,6 +2012,7 @@ static int tegra_pcie_ep_raise_irq(struct dw_pcie_ep *ep, u8 func_no,
static const struct pci_epc_features tegra_pcie_epc_features = {
.linkup_notifier = true,
+ .msi_capable = true,
.bar[BAR_0] = { .type = BAR_FIXED, .fixed_size = SZ_1M,
.only_64bit = true, },
.bar[BAR_1] = { .type = BAR_RESERVED, },
--
2.51.0
next parent reply other threads:[~2025-09-22 14:09 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20250922140822.519796-5-cassel@kernel.org>
2025-09-22 14:08 ` Niklas Cassel [this message]
2025-09-24 15:54 ` [PATCH v2 1/3] PCI: tegra194: Fix broken tegra_pcie_ep_raise_msi_irq() Manivannan Sadhasivam
2025-09-24 16:28 ` Manivannan Sadhasivam
2025-09-25 14:52 ` Niklas Cassel
2025-09-22 14:08 ` [PATCH v2 2/3] PCI: tegra194: Reset BARs when running in PCIe endpoint mode Niklas Cassel
2025-09-22 14:08 ` [PATCH v2 3/3] PCI: tegra194: Handle errors in BPMP response Niklas Cassel
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