From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 963C61E32A2 for ; Mon, 29 Sep 2025 14:53:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759157636; cv=none; b=EWrhAPV/Z5xUu0kWNagNresoQ2kwuV+MrO3ZG0I+uI6Ilh2RcXbKlYYp++RwNVLNifhfcgIR1o+GtqmmTga5fdMtLo4AxrcWm5g8MmnQgqwLgDfncEe5sPDoZIv9b9AQ5OsPOw4ZScT61+lvPevA675dXXmgvAv4O/ixnvNailA= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759157636; c=relaxed/simple; bh=PdQ5JwWWkS4L94+v6VCMl54ln0gmX+jtleGaydPTndk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=DA25BGu1Z/5FUW9U+uQmSD18hO1zI+nIyCaRuf6RkYc8wmk5pCAW9Xq1evhpJy458C6HV4GCtGZvK0zhJOtqIlaKAiOq99K4Kvkchgme5FpQa7hRx1aO++0wTBEYqML2MT2qDlwEgj5JSJnf7S3RDBKc1QUh3WSSFWTHU9aBKls= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=mklNfLZV; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="mklNfLZV" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 95479C4CEF7; Mon, 29 Sep 2025 14:53:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1759157636; bh=PdQ5JwWWkS4L94+v6VCMl54ln0gmX+jtleGaydPTndk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=mklNfLZV9QWUSgXIEW7ojmnaC9ckcgZ/IIfKG4nZgirkhJrU4jfQie/pr3H59RESy FbGAPXgA5HpI4b7s7Eh1nJIgKJxJK9DsHstg6FHeZKjFQRhzFHloKxdF0l3OxOanW7 +Q45nzPSfu2MEGH07nG3LCYNmQm5UmiDQVxrKewK9HYku+GOJlAkBz9v/xJJHis2u9 28bphBrADugr3T9oh8LF1q6M9JZNhsT2wJ+QXi5Dqi+mVRJtWdQPYYOdaKp7Pm0o6O u4DPdLWvqBSy1fgto5SYXZzuCkCPcORFT35cFM5H+4/++ftD7EKEIe9uYRhmV6HvT9 17M8krfdRq7Zw== From: Sasha Levin To: stable@vger.kernel.org Cc: Lukasz Czapnik , Aleksandr Loktionov , Przemek Kitszel , Simon Horman , Rafal Romanowski , Tony Nguyen , Sasha Levin Subject: [PATCH 5.4.y 2/2] i40e: add validation for ring_len param Date: Mon, 29 Sep 2025 10:53:52 -0400 Message-ID: <20250929145352.110268-2-sashal@kernel.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20250929145352.110268-1-sashal@kernel.org> References: <2025092936-anvil-pummel-9e58@gregkh> <20250929145352.110268-1-sashal@kernel.org> Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Lukasz Czapnik [ Upstream commit 55d225670def06b01af2e7a5e0446fbe946289e8 ] The `ring_len` parameter provided by the virtual function (VF) is assigned directly to the hardware memory context (HMC) without any validation. To address this, introduce an upper boundary check for both Tx and Rx queue lengths. The maximum number of descriptors supported by the hardware is 8k-32. Additionally, enforce alignment constraints: Tx rings must be a multiple of 8, and Rx rings must be a multiple of 32. Fixes: 5c3c48ac6bf5 ("i40e: implement virtual device interface") Cc: stable@vger.kernel.org Signed-off-by: Lukasz Czapnik Reviewed-by: Aleksandr Loktionov Signed-off-by: Przemek Kitszel Reviewed-by: Simon Horman Tested-by: Rafal Romanowski Signed-off-by: Tony Nguyen Signed-off-by: Sasha Levin --- drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c b/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c index d8ba409122032..bab1c59c51fa8 100644 --- a/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c +++ b/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c @@ -600,6 +600,13 @@ static int i40e_config_vsi_tx_queue(struct i40e_vf *vf, u16 vsi_id, /* only set the required fields */ tx_ctx.base = info->dma_ring_addr / 128; + + /* ring_len has to be multiple of 8 */ + if (!IS_ALIGNED(info->ring_len, 8) || + info->ring_len > I40E_MAX_NUM_DESCRIPTORS_XL710) { + ret = -EINVAL; + goto error_context; + } tx_ctx.qlen = info->ring_len; tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[0]); tx_ctx.rdylist_act = 0; @@ -665,6 +672,13 @@ static int i40e_config_vsi_rx_queue(struct i40e_vf *vf, u16 vsi_id, /* only set the required fields */ rx_ctx.base = info->dma_ring_addr / 128; + + /* ring_len has to be multiple of 32 */ + if (!IS_ALIGNED(info->ring_len, 32) || + info->ring_len > I40E_MAX_NUM_DESCRIPTORS_XL710) { + ret = -EINVAL; + goto error_param; + } rx_ctx.qlen = info->ring_len; if (info->splithdr_enabled) { -- 2.51.0