From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3031A2750FA for ; Mon, 20 Oct 2025 16:13:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760976819; cv=none; b=GCMZKTAbP8B1NgJABpIcbh43lONilbqHWRlyxij20MdOs/Km7nD9Ov5b7SBEREZFDVXOvg2n22Vj1nhBwximkgyGUsEB9h/3oyCAsVurK2DDFTosR5zQgXUDgQ966VhDcglQjhIcaORzbEXx6bcJkFijfHknA+EfmD5PKhw4zs0= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760976819; c=relaxed/simple; bh=pzQgvwgWRkbwTRIQJhEEomMWi3BapE0ZqCSC+UKCe2c=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=ErceHdvhAR3Mybz1ETc4ScZ//laBwAPJk3AaFjK2e7/6xuZAYsbIwqmnAyyF4n9Dvw6rxBH+lThI9A98bbbG9s8T2/mZIK8O4Hcum/xGwPcRubmggE/LNjGpXukpCluJhJ7aiaTFtzu0/OPpcQWDEQvpWoxUzhmCOWFjnuOJnTE= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=u1kf9JQa; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="u1kf9JQa" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0CA47C4CEF9; Mon, 20 Oct 2025 16:13:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1760976818; bh=pzQgvwgWRkbwTRIQJhEEomMWi3BapE0ZqCSC+UKCe2c=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=u1kf9JQardwy9FI9pqobGzUoRWOrDKHbdHqEc13JQ1Hk4qFcbrBt9kHkvuM3WsmRW Ai/+YduyCAaDuzM9f7FS8c0hgPlzwODOPAQfZ42l3CSSnqZ+WvO3IOsetVTNYZJVpe OcH0MHufiIQ8afTOZpISuSrG6RQ8L3tUpx92Ml8Irp2E0uKcc638h7doES7gnH2w/h x4kHaLnPMUBtpbok9EzkoS3NVT2Wsr6E4Mj4dBGzxzw+k4lmc8MjMjEUz+oMsUTxRK HMnA6/DjSmqH5fb6bVG8lLVswiEj5KXhHBUhbPBDwlGkNDY5M+GgjquPXv7A+0+Bek qDUgUgsjbJUAA== From: Sasha Levin To: stable@vger.kernel.org Cc: Siddharth Vadapalli , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Manivannan Sadhasivam , Sasha Levin Subject: [PATCH 6.1.y 1/2] PCI: j721e: Enable ACSPCIE Refclk if "ti,syscon-acspcie-proxy-ctrl" exists Date: Mon, 20 Oct 2025 12:13:33 -0400 Message-ID: <20251020161334.1833628-1-sashal@kernel.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <2025101615-busload-bright-ced9@gregkh> References: <2025101615-busload-bright-ced9@gregkh> Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Siddharth Vadapalli [ Upstream commit 82c4be4168e26a5593aaa1002b5678128a638824 ] The ACSPCIE module is capable of driving the reference clock required by the PCIe Endpoint device. It is an alternative to on-board and external reference clock generators. Enabling the output from the ACSPCIE module's PAD IO Buffers requires clearing the "PAD IO disable" bits of the ACSPCIE_PROXY_CTRL register in the CTRL_MMR register space. Add support to enable the ACSPCIE reference clock output using the optional device-tree property "ti,syscon-acspcie-proxy-ctrl". Link: https://lore.kernel.org/linux-pci/20240829105316.1483684-3-s-vadapalli@ti.com Signed-off-by: Siddharth Vadapalli Signed-off-by: Krzysztof Wilczyński Reviewed-by: Manivannan Sadhasivam Stable-dep-of: f842d3313ba1 ("PCI: j721e: Fix programming sequence of "strap" settings") Signed-off-by: Sasha Levin --- drivers/pci/controller/cadence/pci-j721e.c | 39 +++++++++++++++++++++- 1 file changed, 38 insertions(+), 1 deletion(-) diff --git a/drivers/pci/controller/cadence/pci-j721e.c b/drivers/pci/controller/cadence/pci-j721e.c index a82f845cc4b52..7ec7fcfeb1a2e 100644 --- a/drivers/pci/controller/cadence/pci-j721e.c +++ b/drivers/pci/controller/cadence/pci-j721e.c @@ -46,6 +46,7 @@ enum link_status { #define LANE_COUNT_MASK BIT(8) #define LANE_COUNT(n) ((n) << 8) +#define ACSPCIE_PAD_DISABLE_MASK GENMASK(1, 0) #define GENERATION_SEL_MASK GENMASK(1, 0) #define MAX_LANES 2 @@ -218,6 +219,36 @@ static int j721e_pcie_set_lane_count(struct j721e_pcie *pcie, return ret; } +static int j721e_enable_acspcie_refclk(struct j721e_pcie *pcie, + struct regmap *syscon) +{ + struct device *dev = pcie->cdns_pcie->dev; + struct device_node *node = dev->of_node; + u32 mask = ACSPCIE_PAD_DISABLE_MASK; + struct of_phandle_args args; + u32 val; + int ret; + + ret = of_parse_phandle_with_fixed_args(node, + "ti,syscon-acspcie-proxy-ctrl", + 1, 0, &args); + if (ret) { + dev_err(dev, + "ti,syscon-acspcie-proxy-ctrl has invalid arguments\n"); + return ret; + } + + /* Clear PAD IO disable bits to enable refclk output */ + val = ~(args.args[0]); + ret = regmap_update_bits(syscon, 0, mask, val); + if (ret) { + dev_err(dev, "failed to enable ACSPCIE refclk: %d\n", ret); + return ret; + } + + return 0; +} + static int j721e_pcie_ctrl_init(struct j721e_pcie *pcie) { struct device *dev = pcie->cdns_pcie->dev; @@ -257,7 +288,13 @@ static int j721e_pcie_ctrl_init(struct j721e_pcie *pcie) return ret; } - return 0; + /* Enable ACSPCIE refclk output if the optional property exists */ + syscon = syscon_regmap_lookup_by_phandle_optional(node, + "ti,syscon-acspcie-proxy-ctrl"); + if (!syscon) + return 0; + + return j721e_enable_acspcie_refclk(pcie, syscon); } static int cdns_ti_pcie_config_read(struct pci_bus *bus, unsigned int devfn, -- 2.51.0