From: "Niklas Söderlund" <niklas.soderlund@ragnatech.se>
To: Prabhakar <prabhakar.csengg@gmail.com>
Cc: Paul Barker <paul@pbarker.dev>,
Andrew Lunn <andrew+netdev@lunn.ch>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Mitsuhiro Kimura <mitsuhiro.kimura.kc@renesas.com>,
netdev@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
linux-kernel@vger.kernel.org,
Biju Das <biju.das.jz@bp.renesas.com>,
Fabrizio Castro <fabrizio.castro.jz@renesas.com>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>,
stable@vger.kernel.org
Subject: Re: [PATCH v2 4/4] net: ravb: Ensure memory write completes before ringing TX doorbell
Date: Wed, 22 Oct 2025 14:16:14 +0200 [thread overview]
Message-ID: <20251022121614.GE1694476@ragnatech.se> (raw)
In-Reply-To: <20251017151830.171062-5-prabhakar.mahadev-lad.rj@bp.renesas.com>
Hello Lad,
Thanks for your work.
On 2025-10-17 16:18:30 +0100, Prabhakar wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Add a final dma_wmb() barrier before triggering the transmit request
> (TCCR_TSRQ) to ensure all descriptor and buffer writes are visible to
> the DMA engine.
>
> According to the hardware manual, a read-back operation is required
> before writing to the doorbell register to guarantee completion of
> previous writes. Instead of performing a dummy read, a dma_wmb() is
> used to both enforce the same ordering semantics on the CPU side and
> also to ensure completion of writes.
>
> Fixes: c156633f1353 ("Renesas Ethernet AVB driver proper")
> Cc: stable@vger.kernel.org
> Co-developed-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
> Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
> ---
> v1->v2:
> - New patch added to separate out the memory barrier change
> before ringing the doorbell.
> ---
> drivers/net/ethernet/renesas/ravb_main.c | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/drivers/net/ethernet/renesas/ravb_main.c b/drivers/net/ethernet/renesas/ravb_main.c
> index 0e40001f64b4..c3fc15f9ec85 100644
> --- a/drivers/net/ethernet/renesas/ravb_main.c
> +++ b/drivers/net/ethernet/renesas/ravb_main.c
> @@ -2232,6 +2232,14 @@ static netdev_tx_t ravb_start_xmit(struct sk_buff *skb, struct net_device *ndev)
> dma_wmb();
> desc->die_dt = DT_FSINGLE;
> }
> +
> + /* Before ringing the doorbell we need to make sure that the latest
> + * writes have been committed to memory, otherwise it could delay
> + * things until the doorbell is rang again.
> + * This is in replacement of the read operation mentioned in the HW
nit: I would spell out hardware here, if you do a v3.
> + * manuals.
> + */
> + dma_wmb();
> ravb_modify(ndev, TCCR, TCCR_TSRQ0 << q, TCCR_TSRQ0 << q);
>
> priv->cur_tx[q] += num_tx_desc;
> --
> 2.43.0
>
--
Kind Regards,
Niklas Söderlund
prev parent reply other threads:[~2025-10-22 12:16 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20251017151830.171062-1-prabhakar.mahadev-lad.rj@bp.renesas.com>
2025-10-17 15:18 ` [PATCH v2 1/4] net: ravb: Make DBAT entry count configurable per-SoC Prabhakar
2025-10-23 1:13 ` Jakub Kicinski
2025-10-23 10:51 ` Lad, Prabhakar
2025-10-17 15:18 ` [PATCH v2 2/4] net: ravb: Allocate correct number of queues based on SoC support Prabhakar
2025-10-23 1:13 ` Jakub Kicinski
2025-10-23 10:52 ` Lad, Prabhakar
2025-10-17 15:18 ` [PATCH v2 3/4] net: ravb: Enforce descriptor type ordering Prabhakar
2025-10-22 12:11 ` Niklas Söderlund
2025-10-17 15:18 ` [PATCH v2 4/4] net: ravb: Ensure memory write completes before ringing TX doorbell Prabhakar
2025-10-22 12:16 ` Niklas Söderlund [this message]
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