From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DDFD32D73B1; Mon, 27 Oct 2025 19:07:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761592024; cv=none; b=kJ+ZqSbAX+vjYBQzoDBKV8glF6Pd0YJDukPv82rWjlYxGKtQrnt6fEQfZ0z0RJf0RUwlm//hXexcYF//PU3QOhK2+F5srDbnE1JTCmB7RBuSvD964XZ3fhumV/4919LAZxTl5r2vg5g6oykXzspZJWrJy3IOtWXsHR3vsUZMv6A= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761592024; c=relaxed/simple; bh=0b2TBOPzHfygLpossAsJ1rlCmddE5I4aD0x+sjZnNa8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=MpqS4o0B/QXrBqCe29wtvO2xKVB9SMsE8z5G25E27rRf1KJNj/Xhd3DKprkYFy5UDxiU8bpSaU+n/NV3NlVOa/i5uHNe2m13BK7mbKnpojzz+ZHpKFiz3ZSNqpdXQtbFQpk/yj8Q17EZMRfnSCFtF8tQhV3y6Q/N0j05fa5VOuE= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=xmhEEkQ/; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="xmhEEkQ/" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4984CC4CEF1; Mon, 27 Oct 2025 19:07:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1761592023; bh=0b2TBOPzHfygLpossAsJ1rlCmddE5I4aD0x+sjZnNa8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=xmhEEkQ/9UuDa9TqWaHhDx3xJo8vP/c3X4lRTndw0lyBEvFsmy1V3lksDgmQ++A+4 YsrfwJYPyAW2u1Wb2ibt1xGoXAep7vt8x7Vg5wQh5lSej3jgWV94I/QAYm2rR73Tfx VmUnwvTDYhlVYXGeqqlzB+jLTIesLsUe2qDA8FJg= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Mark Rutland , James Morse , Will Deacon , Catalin Marinas , Ryan Roberts Subject: [PATCH 5.15 088/123] arm64: errata: Apply workarounds for Neoverse-V3AE Date: Mon, 27 Oct 2025 19:36:08 +0100 Message-ID: <20251027183448.745482203@linuxfoundation.org> X-Mailer: git-send-email 2.51.1 In-Reply-To: <20251027183446.381986645@linuxfoundation.org> References: <20251027183446.381986645@linuxfoundation.org> User-Agent: quilt/0.69 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 5.15-stable review patch. If anyone has any objections, please let me know. ------------------ From: Mark Rutland commit 0c33aa1804d101c11ba1992504f17a42233f0e11 upstream. Neoverse-V3AE is also affected by erratum #3312417, as described in its Software Developer Errata Notice (SDEN) document: Neoverse V3AE (MP172) SDEN v9.0, erratum 3312417 https://developer.arm.com/documentation/SDEN-2615521/9-0/ Enable the workaround for Neoverse-V3AE, and document this. Signed-off-by: Mark Rutland Cc: James Morse Cc: Will Deacon Cc: Catalin Marinas Signed-off-by: Ryan Roberts Signed-off-by: Will Deacon [ Ryan: Trivial backport ] Signed-off-by: Ryan Roberts Signed-off-by: Greg Kroah-Hartman --- Documentation/arm64/silicon-errata.rst | 2 ++ arch/arm64/Kconfig | 1 + arch/arm64/kernel/cpu_errata.c | 1 + 3 files changed, 4 insertions(+) --- a/Documentation/arm64/silicon-errata.rst +++ b/Documentation/arm64/silicon-errata.rst @@ -160,6 +160,8 @@ stable kernels. +----------------+-----------------+-----------------+-----------------------------+ | ARM | Neoverse-V3 | #3312417 | ARM64_ERRATUM_3194386 | +----------------+-----------------+-----------------+-----------------------------+ +| ARM | Neoverse-V3AE | #3312417 | ARM64_ERRATUM_3194386 | ++----------------+-----------------+-----------------+-----------------------------+ | ARM | MMU-500 | #841119,826419 | N/A | +----------------+-----------------+-----------------+-----------------------------+ | ARM | MMU-600 | #1076982,1209401| N/A | --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -875,6 +875,7 @@ config ARM64_ERRATUM_3194386 * ARM Neoverse-V1 erratum 3324341 * ARM Neoverse V2 erratum 3324336 * ARM Neoverse-V3 erratum 3312417 + * ARM Neoverse-V3AE erratum 3312417 On affected cores "MSR SSBS, #0" instructions may not affect subsequent speculative instructions, which may permit unexepected --- a/arch/arm64/kernel/cpu_errata.c +++ b/arch/arm64/kernel/cpu_errata.c @@ -424,6 +424,7 @@ static const struct midr_range erratum_s MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V1), MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V2), MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V3), + MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V3AE), {} }; #endif