From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3B564335BA7 for ; Mon, 5 Jan 2026 16:49:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767631743; cv=none; b=OoZX3x9yazsGqeVUSDdh718XsCM69y5ou908h95E7wXs+tVhnFHDVTPbrEJB6wJg4WqhUUQKHPL/mgs8TjtXB5wOdv6+tR+Br79E3IEo0IaaGuzd8hlwjVI3udBVEYD6L3oTy6y1hMuj1DBCx0GGqVxg/pWeybJAe7fEgm7pkOA= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767631743; c=relaxed/simple; bh=u97xeqAlDz1nym0l6r8IdoZlYj9K0RrTePDNgWT2uUM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=eVJCx1XWLPUBgN4hbXG/UNNs+4EuMX8KCC6DBQygWVLcAlZt+gz9wukZjQ4SL2qqFGO1PfjX3d61gJ9H7x3nHoaOfRqewE5lu46d+20sCAOEHfcC5BCfJ/7aVkSa4Idk9SJVHDmzz0oq61QiV4Q2PQsqagCvk0CUzI6ZoLjquqY= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=ODCZ9fSE; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ODCZ9fSE" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 08015C19421; Mon, 5 Jan 2026 16:49:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1767631742; bh=u97xeqAlDz1nym0l6r8IdoZlYj9K0RrTePDNgWT2uUM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ODCZ9fSEJxVLNJ/Uf9rhnu7yJiaFIHObMpXDv/aPQhbJ2MfZbqPDoB7TvlSpYuUez hvkf/c2TaBO6Wh/07/7wrnyJRlDQrnHqWRhbtrACNihIfsccrhztp44fvfmb4OpSAn 2MyDV82OzgdC80/K5clFHoHvoYZbH6UGQ4Rhiuu9U2cWzXN9sAJc2tbaEOofbe9Ek8 QcOPSqbrmPLXFTKXuKBEf5vOODAMQ0/lF6XUbmbHaQyAmOEoeIztP0Tu7hjegjd/Er As+rapbChypzW53bJsfDC5bIlm9hsQNIuK9WQD7gPxaNRo6ISAKpyXhJceXYk8+pEy d8E6I4Wajt/cw== From: Sasha Levin To: stable@vger.kernel.org Cc: Benjamin Gaignard , Andrzej Pietrasiewicz , Ezequiel Garcia , Philipp Zabel , Hans Verkuil , Mauro Carvalho Chehab , Sasha Levin Subject: [PATCH 6.6.y 1/3] media: verisilicon: Store chroma and motion vectors offset Date: Mon, 5 Jan 2026 11:48:58 -0500 Message-ID: <20260105164900.2676927-1-sashal@kernel.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <2026010507-cringe-sterile-73c8@gregkh> References: <2026010507-cringe-sterile-73c8@gregkh> Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Benjamin Gaignard [ Upstream commit 545bf944f978b7468d3a6bd668d9ff6953bc542e ] Store computed values of chroma and motion vectors offset because they depends on width and height values which change if the resolution change. Signed-off-by: Benjamin Gaignard Reviewed-by: Andrzej Pietrasiewicz CC: Ezequiel Garcia CC: Philipp Zabel Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab Stable-dep-of: 19c286b75507 ("media: verisilicon: Fix CPU stalls on G2 bus error") Signed-off-by: Sasha Levin --- drivers/media/platform/verisilicon/hantro.h | 2 ++ drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c | 6 ++++-- 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/verisilicon/hantro.h b/drivers/media/platform/verisilicon/hantro.h index 77aee9489516..e9e15746f0aa 100644 --- a/drivers/media/platform/verisilicon/hantro.h +++ b/drivers/media/platform/verisilicon/hantro.h @@ -328,6 +328,8 @@ struct hantro_vp9_decoded_buffer_info { /* Info needed when the decoded frame serves as a reference frame. */ unsigned short width; unsigned short height; + size_t chroma_offset; + size_t mv_offset; u32 bit_depth : 4; }; diff --git a/drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c b/drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c index 6fc4b555517f..6db1c32fce4d 100644 --- a/drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c +++ b/drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c @@ -158,9 +158,11 @@ static void config_output(struct hantro_ctx *ctx, chroma_addr = luma_addr + chroma_offset(ctx, dec_params); hantro_write_addr(ctx->dev, G2_OUT_CHROMA_ADDR, chroma_addr); + dst->vp9.chroma_offset = chroma_offset(ctx, dec_params); mv_addr = luma_addr + mv_offset(ctx, dec_params); hantro_write_addr(ctx->dev, G2_OUT_MV_ADDR, mv_addr); + dst->vp9.mv_offset = mv_offset(ctx, dec_params); } struct hantro_vp9_ref_reg { @@ -195,7 +197,7 @@ static void config_ref(struct hantro_ctx *ctx, luma_addr = hantro_get_dec_buf_addr(ctx, &buf->base.vb.vb2_buf); hantro_write_addr(ctx->dev, ref_reg->y_base, luma_addr); - chroma_addr = luma_addr + chroma_offset(ctx, dec_params); + chroma_addr = luma_addr + buf->vp9.chroma_offset; hantro_write_addr(ctx->dev, ref_reg->c_base, chroma_addr); } @@ -238,7 +240,7 @@ static void config_ref_registers(struct hantro_ctx *ctx, config_ref(ctx, dst, &ref_regs[2], dec_params, dec_params->alt_frame_ts); mv_addr = hantro_get_dec_buf_addr(ctx, &mv_ref->base.vb.vb2_buf) + - mv_offset(ctx, dec_params); + mv_ref->vp9.mv_offset; hantro_write_addr(ctx->dev, G2_REF_MV_ADDR(0), mv_addr); hantro_reg_write(ctx->dev, &vp9_last_sign_bias, -- 2.51.0