From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CBFD92737EE; Fri, 9 Jan 2026 12:16:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767961016; cv=none; b=DVG81uTzj+O+0Oh0tar0gZ+lWkTTas8VCwRL0DhUJiWm7LdOCdv6wFzQsJQT7qmQPROhkzF9JWXjzL0LKaxLXEaCoVMGCqKoEesT6l8w7RmFlObsn1VSa6wR3qcRtpkahsBW7TYdZy+2bPCWZqtPseyLq1Mj/Dl4dPRy+mKLOkw= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767961016; c=relaxed/simple; bh=nZt2vRq2NpJnuR6ZK20uDwHh1jZhy2eXI/XI4H/+mOw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=EMUfLuIE0HgGzmZuqBatkBl8TF5cqPcp7xhmCnLKssq57Rxsf7XQKFgh6JrDhSbKvKpjWJNDz+6jBOxfs6Z3ZxOd9NReGN512K4k19a7qdOemDR0DXqq8Vi/B7QokVOoelJPeRISyKlCb3IiAtPXfAN7SJnTCKBiwlq4y63xPY0= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=JHx7Cn/A; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="JHx7Cn/A" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0FC84C4CEF1; Fri, 9 Jan 2026 12:16:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1767961016; bh=nZt2vRq2NpJnuR6ZK20uDwHh1jZhy2eXI/XI4H/+mOw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=JHx7Cn/AgMwU+ktic7g2HoeNfkghlktolIde2VQIKgHXL7pye94SgfSfX/XpukJmv pgD+CfEzEGwPI4oCucM/y+I3MYo7wd0uiafUiV15Jtz/wmsIPypEfwK2y5s7EY9nOO MSGxJN+PzTyggdEs5JoPGZBxNxg20sFQVuX3rItE= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Sven Schnelle , Helge Deller Subject: [PATCH 6.6 573/737] parisc: entry.S: fix space adjustment on interruption for 64-bit userspace Date: Fri, 9 Jan 2026 12:41:52 +0100 Message-ID: <20260109112155.556403926@linuxfoundation.org> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20260109112133.973195406@linuxfoundation.org> References: <20260109112133.973195406@linuxfoundation.org> User-Agent: quilt/0.69 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 6.6-stable review patch. If anyone has any objections, please let me know. ------------------ From: Sven Schnelle commit 1aa4524c0c1b54842c4c0a370171d11b12d0709b upstream. In wide mode, the IASQ contain the upper part of the GVA during interruption. This needs to be reversed before the space is used - otherwise it contains parts of IAOQ. See Page 2-13 "Processing Resources / Interruption Instruction Address Queues" in the Parisc 2.0 Architecture Manual page 2-13 for an explanation. The IAOQ/IASQ space_adjust was skipped for other interruptions than itlb misses. However, the code in handle_interruption() checks whether iasq[0] contains a valid space. Due to the not masked out bits this match failed and the process was killed. Also add space_adjust for IAOQ1/IASQ1 so ptregs contains sane values. Signed-off-by: Sven Schnelle Cc: stable@vger.kernel.org # v6.0+ Signed-off-by: Helge Deller Signed-off-by: Greg Kroah-Hartman --- arch/parisc/kernel/entry.S | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) --- a/arch/parisc/kernel/entry.S +++ b/arch/parisc/kernel/entry.S @@ -1059,8 +1059,6 @@ ENTRY_CFI(intr_save) /* for os_hpmc */ STREG %r17, PT_IOR(%r29) #if defined(CONFIG_64BIT) - b,n intr_save2 - skip_save_ior: /* We have a itlb miss, and when executing code above 4 Gb on ILP64, we * need to adjust iasq/iaoq here in the same way we adjusted isr/ior @@ -1069,10 +1067,17 @@ skip_save_ior: bb,COND(>=),n %r8,PSW_W_BIT,intr_save2 LDREG PT_IASQ0(%r29), %r16 LDREG PT_IAOQ0(%r29), %r17 - /* adjust iasq/iaoq */ + /* adjust iasq0/iaoq0 */ space_adjust %r16,%r17,%r1 STREG %r16, PT_IASQ0(%r29) STREG %r17, PT_IAOQ0(%r29) + + LDREG PT_IASQ1(%r29), %r16 + LDREG PT_IAOQ1(%r29), %r17 + /* adjust iasq1/iaoq1 */ + space_adjust %r16,%r17,%r1 + STREG %r16, PT_IASQ1(%r29) + STREG %r17, PT_IAOQ1(%r29) #else skip_save_ior: #endif