From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 032CA1B4223 for ; Wed, 21 Jan 2026 02:57:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768964262; cv=none; b=cGZqdPIll5utMIbq9cqEBYzfD0hZ+4qrYRMF8rmbfF0X9TeD7Kk1S/RRVWc38AUbS3FkMhA9sw/wispUlfD/3xJ/8XIxEC7DJLaJyRw+SS1ajTHtd+12/XUFn3+R+yLP6m+85hwC88+xRErdXiV1JcEFvn5Ux/G4NOjp3JkGLWY= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768964262; c=relaxed/simple; bh=hbP6G2OEiSDygai0RblmEL6US2r6+OFe2H5LSh1lFQ4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=GRUfDtcDTPzIicL5SINhu2Ei/LG9U3Cv1cojsLIvg+/srcGL4RSlDOnU8bhErIIKhPrxjWLv8XbKWdb2QHshIkpzDdPdbzlTn/+euNBKKSWr19jxUFwIFrEdLfb3kEpk/6gteZBVXDDl/mlIfzbRBHCyxi7Bmd8k4ixwKeE38tI= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=D4L5k5eQ; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="D4L5k5eQ" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 13B79C19423; Wed, 21 Jan 2026 02:57:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1768964261; bh=hbP6G2OEiSDygai0RblmEL6US2r6+OFe2H5LSh1lFQ4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=D4L5k5eQETE4awRaX8mxyVqjLiQPu49WdLItsxEzkeNRuBlWasoMUQereR4IRrOSR eGACV4Thjd/YS8MoQ2BxsAPTwKy0eWGPW5q5g+jJinID4btZikF+8Fyz1b4RMlgBz2 wI/XUuol2NHzIs4LhQP38OnDyw3RzlcCPWxMQvI11LW9oTK19U0xsk2GnHxPv1EzdI 3jGCZ3g6mIxb/cce+aKgHT8i4yW4gsowtQeK+J5CyE3zCUSx9yyWn28eIS6Pvc1bQt IoaQPcA4lpv6FwsTZQ29A1SPPZdMp++bcljDM8MdxpoObLasz1H7rHGeFI8Mb8sNNv pRtvFSQx/j7Kg== From: Sasha Levin To: stable@vger.kernel.org Cc: Xiaochen Shen , "Borislav Petkov (AMD)" , Reinette Chatre , Sasha Levin Subject: [PATCH 5.10.y 2/2] x86/resctrl: Add missing resctrl initialization for Hygon Date: Tue, 20 Jan 2026 21:57:38 -0500 Message-ID: <20260121025738.1158111-2-sashal@kernel.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260121025738.1158111-1-sashal@kernel.org> References: <2026012056-existing-collide-49ad@gregkh> <20260121025738.1158111-1-sashal@kernel.org> Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Xiaochen Shen [ Upstream commit 6ee98aabdc700b5705e4f1833e2edc82a826b53b ] Hygon CPUs supporting Platform QoS features currently undergo partial resctrl initialization through resctrl_cpu_detect() in the Hygon BSP init helper and AMD/Hygon common initialization code. However, several critical data structures remain uninitialized for Hygon CPUs in the following paths: - get_mem_config()-> __rdt_get_mem_config_amd(): rdt_resource::membw,alloc_capable hw_res::num_closid - rdt_init_res_defs()->rdt_init_res_defs_amd(): rdt_resource::cache hw_res::msr_base,msr_update Add the missing AMD/Hygon common initialization to ensure proper Platform QoS functionality on Hygon CPUs. Fixes: d8df126349da ("x86/cpu/hygon: Add missing resctrl_cpu_detect() in bsp_init helper") Signed-off-by: Xiaochen Shen Signed-off-by: Borislav Petkov (AMD) Reviewed-by: Reinette Chatre Cc: stable@vger.kernel.org Link: https://patch.msgid.link/20251209062650.1536952-2-shenxiaochen@open-hieco.net [ Adjust context ] Signed-off-by: Sasha Levin --- arch/x86/kernel/cpu/resctrl/core.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resctrl/core.c index 32005e229c03c..7dae63a953abc 100644 --- a/arch/x86/kernel/cpu/resctrl/core.c +++ b/arch/x86/kernel/cpu/resctrl/core.c @@ -834,7 +834,8 @@ static __init bool get_mem_config(void) if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) return __get_mem_config_intel(&rdt_resources_all[RDT_RESOURCE_MBA]); - else if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) + else if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD || + boot_cpu_data.x86_vendor == X86_VENDOR_HYGON) return __rdt_get_mem_config_amd(&rdt_resources_all[RDT_RESOURCE_MBA]); return false; @@ -960,7 +961,8 @@ static __init void rdt_init_res_defs(void) { if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) rdt_init_res_defs_intel(); - else if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) + else if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD || + boot_cpu_data.x86_vendor == X86_VENDOR_HYGON) rdt_init_res_defs_amd(); } -- 2.51.0