From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3D273369960; Wed, 28 Jan 2026 15:29:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769614167; cv=none; b=goM5qk97ag24EUg81wFDs91522W+QRKHILThaGbtqRuQUT17jjJ8D9akv3vjfpF6n3/CJd8PiITNpFY2Mcw+GMEB9xivbRZuWPDkPJzevsl/yRhDpoQfxWkC79LuxUHddg11ZCAP5bAMobf5Pg2aenaH4gkOEOBOiJ7mNVnT2gs= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769614167; c=relaxed/simple; bh=usuxPJPHK1/7fvby/4EWVd5py0wn/BZXLZNGG/BMbuU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=R3GCOAFHB5Oo6fXqpYVqrmuHYECm2vzf/fDBTuAr1kKpWJLX/OjTdDZQOKFdxuprPVk5aN5gvVR0pve5ye03QgXh9wvTN8ub1C1etR8oGsf6WkQiGB71uJqd4V51kqIiUyFaZjRiWzWdJi+CciHHCfAix19P0XDnWDsN9aTw8RA= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=g148Azxv; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="g148Azxv" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 99DE3C4CEF1; Wed, 28 Jan 2026 15:29:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1769614167; bh=usuxPJPHK1/7fvby/4EWVd5py0wn/BZXLZNGG/BMbuU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=g148AzxvIA/hhvYdnIex97zncOhX2lSsJSQ/n0mCdIZDag48GwZ8YN7ZRBBPVJ4E7 QRZ1Kiwm2RLrkBR13mbPhgRTMWj7Pcs1dSBJseaJwSztxBm6xhFotfK9mEs5sWKqep FfCkMcFBpnssgsZ6SGDIjHuIHZKDnza8nnRidATI= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Wayne Chang , Vinod Koul Subject: [PATCH 6.6 055/254] phy: tegra: xusb: Explicitly configure HS_DISCON_LEVEL to 0x7 Date: Wed, 28 Jan 2026 16:20:31 +0100 Message-ID: <20260128145346.680070115@linuxfoundation.org> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20260128145344.698118637@linuxfoundation.org> References: <20260128145344.698118637@linuxfoundation.org> User-Agent: quilt/0.69 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 6.6-stable review patch. If anyone has any objections, please let me know. ------------------ From: Wayne Chang commit b246caa68037aa495390a60d080acaeb84f45fff upstream. The USB2 Bias Pad Control register manages analog parameters for signal detection. Previously, the HS_DISCON_LEVEL relied on hardware reset values, which may lead to the detection failure. Explicitly configure HS_DISCON_LEVEL to 0x7. This ensures the disconnect threshold is sufficient to guarantee reliable detection. Fixes: bbf711682cd5 ("phy: tegra: xusb: Add Tegra186 support") Cc: stable@vger.kernel.org Signed-off-by: Wayne Chang Link: https://patch.msgid.link/20251212032116.768307-1-waynec@nvidia.com Signed-off-by: Vinod Koul Signed-off-by: Greg Kroah-Hartman --- drivers/phy/tegra/xusb-tegra186.c | 3 +++ 1 file changed, 3 insertions(+) --- a/drivers/phy/tegra/xusb-tegra186.c +++ b/drivers/phy/tegra/xusb-tegra186.c @@ -84,6 +84,7 @@ #define XUSB_PADCTL_USB2_BIAS_PAD_CTL0 0x284 #define BIAS_PAD_PD BIT(11) #define HS_SQUELCH_LEVEL(x) (((x) & 0x7) << 0) +#define HS_DISCON_LEVEL(x) (((x) & 0x7) << 3) #define XUSB_PADCTL_USB2_BIAS_PAD_CTL1 0x288 #define USB2_TRK_START_TIMER(x) (((x) & 0x7f) << 12) @@ -623,6 +624,8 @@ static void tegra186_utmi_bias_pad_power value &= ~BIAS_PAD_PD; value &= ~HS_SQUELCH_LEVEL(~0); value |= HS_SQUELCH_LEVEL(priv->calib.hs_squelch); + value &= ~HS_DISCON_LEVEL(~0); + value |= HS_DISCON_LEVEL(0x7); padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL0); udelay(1);