From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A3F7D2264A8 for ; Wed, 28 Jan 2026 23:16:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.13 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769642200; cv=none; b=dgqFzknh5Bl9z4zm9eKRuWWvtB/q9IAdZlkMRZABTKcQG4EiXlrBc4mlaBI+IZGSafSb7s45oBmzn9yFmcm8sijyJjJZ9W6DkoVWhDXbINShlvqdpnDF4cXx+YNnWpFP/WoHmpHA54IfQzN/zDYeJnJO8LIL9pOFoxJvv13Gj6c= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769642200; c=relaxed/simple; bh=b4g/sRgvIZ8pMR4zw+kEXTJPFw16baaA0W+pIdXPmgw=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=TPYc4kSfARUdAGn1HKsimXFWRiuULb6T5k9M4lQkVYauqlw0VNJZQzSZmImNtUryLIeqc1WwM4IPO7hrtPk0+/1OedHcVSGqWPKCeL7KOZzNI+zlK8hiXQ1O1mgEBWgkkp6JhAkYk+u+/CwlnHZ2kjkPAI8kpZXCobyO/qMUrsg= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=dHGiSKrg; arc=none smtp.client-ip=192.198.163.13 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="dHGiSKrg" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1769642199; x=1801178199; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=b4g/sRgvIZ8pMR4zw+kEXTJPFw16baaA0W+pIdXPmgw=; b=dHGiSKrgcI5RYcXVrP0OryOQbxPu0+JpfZdnBK1Z4rCghzooYPpoe0Zk J6JT2VSgnMt9zsBhLGUtgLQUDxMYEhC7/6+PPYOlXbSkl7DdhQrkaMtRk 3FcjxiENgj1J88q+sUTkLDG0IZnbp7zc4R2vvMQsiD8UHRJeQ0WjU5h9X bZxE8zjG8SX8t/iEhVltWP65D21vYulcZ/ChKl74YWtsj0ql8+uoXMSrm c6tqJm0IagxC9g0Y5jN50TGt6OAX4b2/ricg60Vtj3TTL3pOVHkh8zNlh WSMhaE2S87V5IPrJZxeg6oUtr9+N0j8dtf8NmIQMgoA+GzkT69J1ek9sj Q==; X-CSE-ConnectionGUID: hDfnA4a9QLWejtswGSCG0Q== X-CSE-MsgGUID: E6ZfMsdRSLG7uIeaQrYG0g== X-IronPort-AV: E=McAfee;i="6800,10657,11685"; a="73462219" X-IronPort-AV: E=Sophos;i="6.21,258,1763452800"; d="scan'208";a="73462219" Received: from fmviesa004.fm.intel.com ([10.60.135.144]) by fmvoesa107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Jan 2026 15:16:36 -0800 X-CSE-ConnectionGUID: SsGEddwgSfmcTB8+QeRBlA== X-CSE-MsgGUID: EIy/yEMrSPKALCItQ2Msfg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,258,1763452800"; d="scan'208";a="213266645" Received: from guc-pnp-dev-box-1.fm.intel.com ([10.1.39.24]) by fmviesa004.fm.intel.com with ESMTP; 28 Jan 2026 15:16:36 -0800 From: Zhanjun Dong To: intel-xe@lists.freedesktop.org Cc: Zhanjun Dong , stable@vger.kernel.org, Matthew Brost Subject: [PATCH v5 3/6] drm/xe: Trigger queue cleanup if not in wedged mode 2 Date: Wed, 28 Jan 2026 18:16:31 -0500 Message-Id: <20260128231634.982494-4-zhanjun.dong@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260128231634.982494-1-zhanjun.dong@intel.com> References: <20260128231634.982494-1-zhanjun.dong@intel.com> Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The intent of wedging a device is to allow queues to continue running only in wedged mode 2. In other modes, queues should initiate cleanup and signal all remaining fences. Fix xe_guc_submit_wedge to correctly clean up queues when wedge mode != 2. Fixes: 7dbe8af13c18 ("drm/xe: Wedge the entire device") Cc: stable@vger.kernel.org Signed-off-by: Matthew Brost Signed-off-by: Zhanjun Dong --- drivers/gpu/drm/xe/xe_guc_submit.c | 32 ++++++++++++++++++------------ 1 file changed, 19 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c index 92ea32423838..612ded5878fd 100644 --- a/drivers/gpu/drm/xe/xe_guc_submit.c +++ b/drivers/gpu/drm/xe/xe_guc_submit.c @@ -1326,6 +1326,7 @@ static void disable_scheduling_deregister(struct xe_guc *guc, */ void xe_guc_submit_wedge(struct xe_guc *guc) { + struct xe_device *xe = guc_to_xe(guc); struct xe_gt *gt = guc_to_gt(guc); struct xe_exec_queue *q; unsigned long index; @@ -1340,20 +1341,25 @@ void xe_guc_submit_wedge(struct xe_guc *guc) if (!guc->submission_state.initialized) return; - err = devm_add_action_or_reset(guc_to_xe(guc)->drm.dev, - guc_submit_wedged_fini, guc); - if (err) { - xe_gt_err(gt, "Failed to register clean-up in wedged.mode=%s; " - "Although device is wedged.\n", - xe_wedged_mode_to_string(XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET)); - return; - } + if (xe->wedged.mode == 2) { + err = devm_add_action_or_reset(guc_to_xe(guc)->drm.dev, + guc_submit_wedged_fini, guc); + if (err) { + xe_gt_err(gt, "Failed to register clean-up on wedged.mode=2; " + "Although device is wedged.\n"); + return; + } - mutex_lock(&guc->submission_state.lock); - xa_for_each(&guc->submission_state.exec_queue_lookup, index, q) - if (xe_exec_queue_get_unless_zero(q)) - set_exec_queue_wedged(q); - mutex_unlock(&guc->submission_state.lock); + mutex_lock(&guc->submission_state.lock); + xa_for_each(&guc->submission_state.exec_queue_lookup, index, q) + if (xe_exec_queue_get_unless_zero(q)) + set_exec_queue_wedged(q); + mutex_unlock(&guc->submission_state.lock); + } else { + /* Forcefully kill any remaining exec queues, signal fences */ + xe_guc_submit_stop(guc); + xe_guc_submit_pause_abort(guc); + } } static bool guc_submit_hint_wedged(struct xe_guc *guc) -- 2.34.1