From: Imre Deak <imre.deak@intel.com>
To: <intel-gfx@lists.freedesktop.org>, <intel-xe@lists.freedesktop.org>
Cc: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>,
<stable@vger.kernel.org>
Subject: [PATCH 1/2] drm/i915/dp: Fix pipe BPP clamping due to HDR
Date: Fri, 6 Feb 2026 12:42:26 +0200 [thread overview]
Message-ID: <20260206104227.290231-1-imre.deak@intel.com> (raw)
The pipe BPP value shouldn't be set outside of the source's / sink's
valid pipe BPP range, ensure this when increasing the minimum pipe BPP
value to 30 due to HDR.
Fixes: ba49a4643cf53 ("drm/i915/dp: Set min_bpp limit to 30 in HDR mode")
Cc: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Cc: <stable@vger.kernel.org> # v6.18+
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
drivers/gpu/drm/i915/display/intel_dp.c | 14 ++++++++++++--
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 2b8f43e211741..4d8f480cf803f 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2697,6 +2697,7 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp,
bool dsc,
struct link_config_limits *limits)
{
+ struct intel_display *display = to_intel_display(intel_dp);
bool is_mst = intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST);
struct intel_connector *connector =
to_intel_connector(conn_state->connector);
@@ -2709,8 +2710,7 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp,
limits->min_lane_count = intel_dp_min_lane_count(intel_dp);
limits->max_lane_count = intel_dp_max_lane_count(intel_dp);
- limits->pipe.min_bpp = intel_dp_in_hdr_mode(conn_state) ? 30 :
- intel_dp_min_bpp(crtc_state->output_format);
+ limits->pipe.min_bpp = intel_dp_min_bpp(crtc_state->output_format);
if (is_mst) {
/*
* FIXME: If all the streams can't fit into the link with their
@@ -2726,6 +2726,16 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp,
respect_downstream_limits);
}
+ if (intel_dp_in_hdr_mode(conn_state)) {
+ if (limits->pipe.min_bpp <= 30 && limits->pipe.max_bpp >= 30)
+ limits->pipe.min_bpp = 30;
+ else
+ drm_dbg_kms(display->drm,
+ "[CONNECTOR:%d:%s] HDR min 30 bpp outside of valid pipe bpp range (%d-%d)\n",
+ connector->base.base.id, connector->base.name,
+ limits->pipe.min_bpp, limits->pipe.max_bpp);
+ }
+
if (dsc && !intel_dp_dsc_compute_pipe_bpp_limits(connector, limits))
return false;
--
2.49.1
next reply other threads:[~2026-02-06 10:43 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-06 10:42 Imre Deak [this message]
2026-02-06 13:50 ` [PATCH 1/2] drm/i915/dp: Fix pipe BPP clamping due to HDR Nautiyal, Ankit K
2026-02-09 6:36 ` Borah, Chaitanya Kumar
2026-02-09 8:40 ` Imre Deak
2026-02-09 9:25 ` Borah, Chaitanya Kumar
2026-02-09 9:34 ` Imre Deak
2026-02-09 10:09 ` Imre Deak
2026-02-09 11:30 ` Nautiyal, Ankit K
2026-02-09 11:54 ` Imre Deak
2026-02-09 12:45 ` Nautiyal, Ankit K
2026-02-09 13:08 ` Imre Deak
2026-02-09 11:49 ` Borah, Chaitanya Kumar
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