* Re: [PATCH] irqchip/gic-v3-its: Limit number of per-device MSIs to the range the ITS supports
2026-02-06 15:48 [PATCH] irqchip/gic-v3-its: Limit number of per-device MSIs to the range the ITS supports Marc Zyngier
@ 2026-02-06 16:01 ` Robin Murphy
2026-02-07 21:22 ` Thomas Gleixner
` (2 subsequent siblings)
3 siblings, 0 replies; 6+ messages in thread
From: Robin Murphy @ 2026-02-06 16:01 UTC (permalink / raw)
To: Marc Zyngier, linux-kernel, linux-arm-kernel; +Cc: Thomas Gleixner, stable
On 2026-02-06 3:48 pm, Marc Zyngier wrote:
> The ITS driver blindly assumes that EventIDs are in abundant supply,
> to the point where it never checks how many the HW actually supports.
>
> It turns out that some pretty esoteric integrations make it so that
> only a few bits are available, all the way down to a. single. bit.
>
> Enforce the advertised limitation at the point of allocating the
> device structure, and hope that the endpoint driver can deal with
> such limitation.
Reviewed-by: Robin Murphy <robin.murphy@arm.com>
> Signed-off-by: Marc Zyngier <maz@kernel.org>
> Cc: stable@vger.kernel.org
> ---
> drivers/irqchip/irq-gic-v3-its.c | 4 ++++
> include/linux/irqchip/arm-gic-v3.h | 1 +
> 2 files changed, 5 insertions(+)
>
> diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
> index 2988def30972b..a51e8e6a81819 100644
> --- a/drivers/irqchip/irq-gic-v3-its.c
> +++ b/drivers/irqchip/irq-gic-v3-its.c
> @@ -3475,6 +3475,7 @@ static struct its_device *its_create_device(struct its_node *its, u32 dev_id,
> int lpi_base;
> int nr_lpis;
> int nr_ites;
> + int id_bits;
> int sz;
>
> if (!its_alloc_device_table(its, dev_id))
> @@ -3486,7 +3487,10 @@ static struct its_device *its_create_device(struct its_node *its, u32 dev_id,
> /*
> * Even if the device wants a single LPI, the ITT must be
> * sized as a power of two (and you need at least one bit...).
> + * Also honor the ITS's own EID limit.
> */
> + id_bits = FIELD_GET(GITS_TYPER_IDBITS, its->typer) + 1;
> + nvecs = min_t(unsigned int, nvecs, BIT(id_bits));
> nr_ites = max(2, nvecs);
> sz = nr_ites * (FIELD_GET(GITS_TYPER_ITT_ENTRY_SIZE, its->typer) + 1);
> sz = max(sz, ITS_ITT_ALIGN);
> diff --git a/include/linux/irqchip/arm-gic-v3.h b/include/linux/irqchip/arm-gic-v3.h
> index 70c0948f978eb..0225121f30138 100644
> --- a/include/linux/irqchip/arm-gic-v3.h
> +++ b/include/linux/irqchip/arm-gic-v3.h
> @@ -394,6 +394,7 @@
> #define GITS_TYPER_VLPIS (1UL << 1)
> #define GITS_TYPER_ITT_ENTRY_SIZE_SHIFT 4
> #define GITS_TYPER_ITT_ENTRY_SIZE GENMASK_ULL(7, 4)
> +#define GITS_TYPER_IDBITS GENMASK_ULL(12, 8)
> #define GITS_TYPER_IDBITS_SHIFT 8
> #define GITS_TYPER_DEVBITS_SHIFT 13
> #define GITS_TYPER_DEVBITS GENMASK_ULL(17, 13)
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH] irqchip/gic-v3-its: Limit number of per-device MSIs to the range the ITS supports
2026-02-06 15:48 [PATCH] irqchip/gic-v3-its: Limit number of per-device MSIs to the range the ITS supports Marc Zyngier
2026-02-06 16:01 ` Robin Murphy
@ 2026-02-07 21:22 ` Thomas Gleixner
2026-02-07 22:25 ` Marc Zyngier
2026-02-08 18:48 ` Zenghui Yu
2026-02-17 10:02 ` [tip: irq/urgent] " tip-bot2 for Marc Zyngier
3 siblings, 1 reply; 6+ messages in thread
From: Thomas Gleixner @ 2026-02-07 21:22 UTC (permalink / raw)
To: Marc Zyngier, linux-kernel, linux-arm-kernel; +Cc: Robin Murphy, stable
On Fri, Feb 06 2026 at 15:48, Marc Zyngier wrote:
> The ITS driver blindly assumes that EventIDs are in abundant supply,
> to the point where it never checks how many the HW actually supports.
>
> It turns out that some pretty esoteric integrations make it so that
> only a few bits are available, all the way down to a. single. bit.
>
> Enforce the advertised limitation at the point of allocating the
> device structure, and hope that the endpoint driver can deal with
> such limitation.
>
> Signed-off-by: Marc Zyngier <maz@kernel.org>
> Cc: stable@vger.kernel.org
Can you please provide a Fixes tag?
Thanks,
tglx
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH] irqchip/gic-v3-its: Limit number of per-device MSIs to the range the ITS supports
2026-02-07 21:22 ` Thomas Gleixner
@ 2026-02-07 22:25 ` Marc Zyngier
0 siblings, 0 replies; 6+ messages in thread
From: Marc Zyngier @ 2026-02-07 22:25 UTC (permalink / raw)
To: Thomas Gleixner; +Cc: linux-kernel, linux-arm-kernel, Robin Murphy, stable
On Sat, 07 Feb 2026 21:22:56 +0000,
Thomas Gleixner <tglx@kernel.org> wrote:
>
> On Fri, Feb 06 2026 at 15:48, Marc Zyngier wrote:
>
> > The ITS driver blindly assumes that EventIDs are in abundant supply,
> > to the point where it never checks how many the HW actually supports.
> >
> > It turns out that some pretty esoteric integrations make it so that
> > only a few bits are available, all the way down to a. single. bit.
> >
> > Enforce the advertised limitation at the point of allocating the
> > device structure, and hope that the endpoint driver can deal with
> > such limitation.
> >
> > Signed-off-by: Marc Zyngier <maz@kernel.org>
> > Cc: stable@vger.kernel.org
>
> Can you please provide a Fixes tag?
That'd be
Fixes: 84a6a2e7fc18d ("irqchip: GICv3: ITS: device allocation and configuration")
Thanks,
M.
--
Without deviation from the norm, progress is not possible.
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] irqchip/gic-v3-its: Limit number of per-device MSIs to the range the ITS supports
2026-02-06 15:48 [PATCH] irqchip/gic-v3-its: Limit number of per-device MSIs to the range the ITS supports Marc Zyngier
2026-02-06 16:01 ` Robin Murphy
2026-02-07 21:22 ` Thomas Gleixner
@ 2026-02-08 18:48 ` Zenghui Yu
2026-02-17 10:02 ` [tip: irq/urgent] " tip-bot2 for Marc Zyngier
3 siblings, 0 replies; 6+ messages in thread
From: Zenghui Yu @ 2026-02-08 18:48 UTC (permalink / raw)
To: Marc Zyngier
Cc: linux-kernel, linux-arm-kernel, Thomas Gleixner, Robin Murphy,
stable
On 2/6/26 11:48 PM, Marc Zyngier wrote:
> The ITS driver blindly assumes that EventIDs are in abundant supply,
> to the point where it never checks how many the HW actually supports.
>
> It turns out that some pretty esoteric integrations make it so that
> only a few bits are available, all the way down to a. single. bit.
>
> Enforce the advertised limitation at the point of allocating the
> device structure, and hope that the endpoint driver can deal with
> such limitation.
>
> Signed-off-by: Marc Zyngier <maz@kernel.org>
> Cc: stable@vger.kernel.org
> ---
> drivers/irqchip/irq-gic-v3-its.c | 4 ++++
> include/linux/irqchip/arm-gic-v3.h | 1 +
> 2 files changed, 5 insertions(+)
>
> diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
> index 2988def30972b..a51e8e6a81819 100644
> --- a/drivers/irqchip/irq-gic-v3-its.c
> +++ b/drivers/irqchip/irq-gic-v3-its.c
> @@ -3475,6 +3475,7 @@ static struct its_device *its_create_device(struct its_node *its, u32 dev_id,
> int lpi_base;
> int nr_lpis;
> int nr_ites;
> + int id_bits;
> int sz;
>
> if (!its_alloc_device_table(its, dev_id))
> @@ -3486,7 +3487,10 @@ static struct its_device *its_create_device(struct its_node *its, u32 dev_id,
> /*
> * Even if the device wants a single LPI, the ITT must be
> * sized as a power of two (and you need at least one bit...).
> + * Also honor the ITS's own EID limit.
> */
> + id_bits = FIELD_GET(GITS_TYPER_IDBITS, its->typer) + 1;
> + nvecs = min_t(unsigned int, nvecs, BIT(id_bits));
> nr_ites = max(2, nvecs);
> sz = nr_ites * (FIELD_GET(GITS_TYPER_ITT_ENTRY_SIZE, its->typer) + 1);
> sz = max(sz, ITS_ITT_ALIGN);
> diff --git a/include/linux/irqchip/arm-gic-v3.h b/include/linux/irqchip/arm-gic-v3.h
> index 70c0948f978eb..0225121f30138 100644
> --- a/include/linux/irqchip/arm-gic-v3.h
> +++ b/include/linux/irqchip/arm-gic-v3.h
> @@ -394,6 +394,7 @@
> #define GITS_TYPER_VLPIS (1UL << 1)
> #define GITS_TYPER_ITT_ENTRY_SIZE_SHIFT 4
> #define GITS_TYPER_ITT_ENTRY_SIZE GENMASK_ULL(7, 4)
> +#define GITS_TYPER_IDBITS GENMASK_ULL(12, 8)
> #define GITS_TYPER_IDBITS_SHIFT 8
> #define GITS_TYPER_DEVBITS_SHIFT 13
> #define GITS_TYPER_DEVBITS GENMASK_ULL(17, 13)
Reviewed-by: Zenghui Yu <zenghui.yu@linux.dev>
Thanks,
Zenghui
^ permalink raw reply [flat|nested] 6+ messages in thread
* [tip: irq/urgent] irqchip/gic-v3-its: Limit number of per-device MSIs to the range the ITS supports
2026-02-06 15:48 [PATCH] irqchip/gic-v3-its: Limit number of per-device MSIs to the range the ITS supports Marc Zyngier
` (2 preceding siblings ...)
2026-02-08 18:48 ` Zenghui Yu
@ 2026-02-17 10:02 ` tip-bot2 for Marc Zyngier
3 siblings, 0 replies; 6+ messages in thread
From: tip-bot2 for Marc Zyngier @ 2026-02-17 10:02 UTC (permalink / raw)
To: linux-tip-commits
Cc: Marc Zyngier, Thomas Gleixner, Robin Murphy, Zenghui Yu, stable,
x86, linux-kernel
The following commit has been merged into the irq/urgent branch of tip:
Commit-ID: ce9e40a9a5e5cff0b1b0d2fa582b3d71a8ce68e8
Gitweb: https://git.kernel.org/tip/ce9e40a9a5e5cff0b1b0d2fa582b3d71a8ce68e8
Author: Marc Zyngier <maz@kernel.org>
AuthorDate: Fri, 06 Feb 2026 15:48:16
Committer: Thomas Gleixner <tglx@kernel.org>
CommitterDate: Tue, 17 Feb 2026 11:00:43 +01:00
irqchip/gic-v3-its: Limit number of per-device MSIs to the range the ITS supports
The ITS driver blindly assumes that EventIDs are in abundant supply, to the
point where it never checks how many the hardware actually supports.
It turns out that some pretty esoteric integrations make it so that only a
few bits are available, all the way down to a single bit.
Enforce the advertised limitation at the point of allocating the device
structure, and hope that the endpoint driver can deal with such limitation.
Fixes: 84a6a2e7fc18d ("irqchip: GICv3: ITS: device allocation and configuration")
Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Thomas Gleixner <tglx@kernel.org>
Reviewed-by: Robin Murphy <robin.murphy@arm.com>
Reviewed-by: Zenghui Yu <zenghui.yu@linux.dev>
Cc: stable@vger.kernel.org
Link: https://patch.msgid.link/20260206154816.3582887-1-maz@kernel.org
---
drivers/irqchip/irq-gic-v3-its.c | 4 ++++
include/linux/irqchip/arm-gic-v3.h | 1 +
2 files changed, 5 insertions(+)
diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
index 2988def..a51e8e6 100644
--- a/drivers/irqchip/irq-gic-v3-its.c
+++ b/drivers/irqchip/irq-gic-v3-its.c
@@ -3475,6 +3475,7 @@ static struct its_device *its_create_device(struct its_node *its, u32 dev_id,
int lpi_base;
int nr_lpis;
int nr_ites;
+ int id_bits;
int sz;
if (!its_alloc_device_table(its, dev_id))
@@ -3486,7 +3487,10 @@ static struct its_device *its_create_device(struct its_node *its, u32 dev_id,
/*
* Even if the device wants a single LPI, the ITT must be
* sized as a power of two (and you need at least one bit...).
+ * Also honor the ITS's own EID limit.
*/
+ id_bits = FIELD_GET(GITS_TYPER_IDBITS, its->typer) + 1;
+ nvecs = min_t(unsigned int, nvecs, BIT(id_bits));
nr_ites = max(2, nvecs);
sz = nr_ites * (FIELD_GET(GITS_TYPER_ITT_ENTRY_SIZE, its->typer) + 1);
sz = max(sz, ITS_ITT_ALIGN);
diff --git a/include/linux/irqchip/arm-gic-v3.h b/include/linux/irqchip/arm-gic-v3.h
index 70c0948..0225121 100644
--- a/include/linux/irqchip/arm-gic-v3.h
+++ b/include/linux/irqchip/arm-gic-v3.h
@@ -394,6 +394,7 @@
#define GITS_TYPER_VLPIS (1UL << 1)
#define GITS_TYPER_ITT_ENTRY_SIZE_SHIFT 4
#define GITS_TYPER_ITT_ENTRY_SIZE GENMASK_ULL(7, 4)
+#define GITS_TYPER_IDBITS GENMASK_ULL(12, 8)
#define GITS_TYPER_IDBITS_SHIFT 8
#define GITS_TYPER_DEVBITS_SHIFT 13
#define GITS_TYPER_DEVBITS GENMASK_ULL(17, 13)
^ permalink raw reply related [flat|nested] 6+ messages in thread