From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B4EE22750E6; Mon, 9 Feb 2026 14:56:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770648973; cv=none; b=kfprnswAYBiUZAAzCgwSQAsyFYJ202mjhO6u85a5CkARMzlI3VhORYxotjN+RPPJ+2BkvR5SuAplYDvwrHQMODrxgD3NZvAbJ4yDS3SFZfs2DVejO1ttu6BZ7gQsTT+VEmKdFEQZIc1z2bqEu9C/HA0vPHcfoISdBFF2A+W6BI4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770648973; c=relaxed/simple; bh=weTBRYkMIohX/gxSIHelI28oUUMxNaev0tVYKyVhL9Y=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=hQ5GC9CTfQbEmSXb7mD4ocM0dRcqK69xubqdvCkADCUJnD/oyORWPPos6gEHz8WQrcWbRMZYui1rsI/B3JPSpIghRtXA0mA1IeubAWAZLLIcn+l4bxmtnBfrR2k6mP2bclO9MJ+X2WJr6tEgdw2oEb6tm4cfz5QH9ewbf3Y68mE= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=m4gUDMpO; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="m4gUDMpO" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2772EC116C6; Mon, 9 Feb 2026 14:56:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1770648973; bh=weTBRYkMIohX/gxSIHelI28oUUMxNaev0tVYKyVhL9Y=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=m4gUDMpOOF/hqPF0tm0qdUxwtgDAjFdJctAhBYxUWiIstlBWdxvix1PJeEbMmTSY4 Z4OOU0MjHs0qE4g2F8AdBjz3bbfMAFK0K4mSD9RHcO+idC5I9S+adyN69mPwTlVO0C vELPVcYn4xJKi8tUF2DhKAwizZvsXLIh2dTyQIKA= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Breno Leitao , Jon Hunter , Thierry Reding , Mark Brown , Sasha Levin Subject: [PATCH 5.15 71/75] spi: tegra210-quad: Protect curr_xfer assignment in tegra_qspi_setup_transfer_one Date: Mon, 9 Feb 2026 15:25:08 +0100 Message-ID: <20260209142304.411094647@linuxfoundation.org> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260209142301.830618238@linuxfoundation.org> References: <20260209142301.830618238@linuxfoundation.org> User-Agent: quilt/0.69 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 5.15-stable review patch. If anyone has any objections, please let me know. ------------------ From: Breno Leitao [ Upstream commit f5a4d7f5e32ba163cff893493ec1cbb0fd2fb0d5 ] When the timeout handler processes a completed transfer and signals completion, the transfer thread can immediately set up the next transfer and assign curr_xfer to point to it. If a delayed ISR from the previous transfer then runs, it checks if (!tqspi->curr_xfer) (currently without the lock also -- to be fixed soon) to detect stale interrupts, but this check passes because curr_xfer now points to the new transfer. The ISR then incorrectly processes the new transfer's context. Protect the curr_xfer assignment with the spinlock to ensure the ISR either sees NULL (and bails out) or sees the new value only after the assignment is complete. Fixes: 921fc1838fb0 ("spi: tegra210-quad: Add support for Tegra210 QSPI controller") Signed-off-by: Breno Leitao Tested-by: Jon Hunter Acked-by: Jon Hunter Acked-by: Thierry Reding Link: https://patch.msgid.link/20260126-tegra_xfer-v2-3-6d2115e4f387@debian.org Signed-off-by: Mark Brown Signed-off-by: Sasha Levin --- drivers/spi/spi-tegra210-quad.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/spi/spi-tegra210-quad.c b/drivers/spi/spi-tegra210-quad.c index 18bd11150a5c6..9649c1855dd3c 100644 --- a/drivers/spi/spi-tegra210-quad.c +++ b/drivers/spi/spi-tegra210-quad.c @@ -794,6 +794,7 @@ static u32 tegra_qspi_setup_transfer_one(struct spi_device *spi, struct spi_tran u32 command1, command2, speed = t->speed_hz; u8 bits_per_word = t->bits_per_word; u32 tx_tap = 0, rx_tap = 0; + unsigned long flags; int req_mode; if (speed != tqspi->cur_speed) { @@ -801,10 +802,12 @@ static u32 tegra_qspi_setup_transfer_one(struct spi_device *spi, struct spi_tran tqspi->cur_speed = speed; } + spin_lock_irqsave(&tqspi->lock, flags); tqspi->cur_pos = 0; tqspi->cur_rx_pos = 0; tqspi->cur_tx_pos = 0; tqspi->curr_xfer = t; + spin_unlock_irqrestore(&tqspi->lock, flags); if (is_first_of_msg) { tegra_qspi_mask_clear_irq(tqspi); -- 2.51.0