[PATCH AUTOSEL 6.19-5.10] PCI: Add ACS quirk for Qualcomm Hamoa & Glymur

[Sasha Levin <sashal@kernel.org>]

From: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>

[ Upstream commit 44d2f70b1fd72c339c72983fcffa181beae3e113 ]

The Qualcomm Hamoa & Glymur Root Ports don't advertise an ACS capability,
but they do provide ACS-like features to disable peer transactions and
validate bus numbers in requests.

Add an ACS quirk for Hamoa & Glymur.

Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://patch.msgid.link/20260109-acs_quirk-v1-1-82adf95a89ae@oss.qualcomm.com
Signed-off-by: Sasha Levin <sashal@kernel.org>
---

LLM Generated explanations, may be completely bogus:

## Analysis

### Commit Message Analysis

This commit adds ACS (Access Control Services) quirk entries for two
Qualcomm root port devices: Hamoa (device ID 0x0111) and Glymur (device
ID 0x0120). The commit message explains that these root ports don't
advertise ACS capability but do provide ACS-like features to disable
peer transactions and validate bus numbers.

### Code Change Analysis

The change is extremely simple and contained:
- **4 lines added** (2 comment lines + 2 data entries) in
  `drivers/pci/quirks.c`
- Adds two new entries to the `pci_dev_acs_enabled` table
- Both entries use `PCI_VENDOR_ID_QCOM` with the existing
  `pci_quirk_qcom_rp_acs` handler
- The pattern is identical to the existing QCOM SA8775P, QDF2xxx, and
  HXT entries already in the table

### Classification: Hardware Quirk / Device ID Addition

This falls squarely into the **"QUIRKS and WORKAROUNDS"** exception
category for stable backports:

1. **It's a PCI quirk** for hardware with broken/missing ACS
   advertisement
2. **The infrastructure already exists** - `pci_quirk_qcom_rp_acs` is
   already in the kernel and used by other Qualcomm devices
3. **Only data table entries are added** - no new code logic whatsoever
4. **It enables correct IOMMU isolation** on these platforms

### Why This Matters

ACS quirks are important for:
- **VFIO/PCIe passthrough**: Without the ACS quirk, IOMMU groups may be
  incorrectly merged, preventing device assignment to VMs
- **Security isolation**: ACS ensures peer-to-peer transactions between
  devices go through the IOMMU, which is critical for DMA security
- **Functionality**: Users with Qualcomm Hamoa or Glymur platforms
  cannot properly use PCIe device passthrough without this quirk

### Risk Assessment

- **Risk: Extremely low** - This only adds entries to a static data
  table. The quirk function `pci_quirk_qcom_rp_acs` is already proven
  and used by other QCOM devices. The new entries will only match on the
  specific vendor:device combinations, so no other hardware is affected.
- **Benefit: Real** - Users with these Qualcomm platforms get correct
  IOMMU group isolation
- **Dependencies: None** - The `pci_quirk_qcom_rp_acs` function and
  `PCI_VENDOR_ID_QCOM` already exist in stable trees
- **Backport complexity: Trivial** - The patch should apply cleanly to
  any stable tree that has the QCOM SA8775P entry (or can be trivially
  adjusted)

### Scope and Stability

- 4 lines of change in a single file
- Pure data addition to an existing table
- No logic changes, no new functions, no new APIs
- Zero risk of regression for any other hardware
- Well-tested pattern (dozens of similar quirk entries exist)

This is a textbook example of a hardware quirk addition that is
appropriate for stable trees. It's small, obviously correct, uses
existing infrastructure, and enables real hardware to work properly.

**YES**

 drivers/pci/quirks.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 9100fd133a7ff..54c76ba9a767e 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -5117,6 +5117,10 @@ static const struct pci_dev_acs_enabled {
 	{ PCI_VENDOR_ID_QCOM, 0x0401, pci_quirk_qcom_rp_acs },
 	/* QCOM SA8775P root port */
 	{ PCI_VENDOR_ID_QCOM, 0x0115, pci_quirk_qcom_rp_acs },
+	/* QCOM Hamoa root port */
+	{ PCI_VENDOR_ID_QCOM, 0x0111, pci_quirk_qcom_rp_acs },
+	/* QCOM Glymur root port */
+	{ PCI_VENDOR_ID_QCOM, 0x0120, pci_quirk_qcom_rp_acs },
 	/* HXT SD4800 root ports. The ACS design is same as QCOM QDF2xxx */
 	{ PCI_VENDOR_ID_HXT, 0x0401, pci_quirk_qcom_rp_acs },
 	/* Intel PCH root ports */
-- 
2.51.0