From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 01F3621D596; Wed, 25 Feb 2026 01:29:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771982977; cv=none; b=seui6uopFhjgLC4exKQLESSYvqX072IBESRE+xRvNdm0LEeiUXog2QsHhmAFq7qXzWyvOKDKltJNAxz20OQRnQlHwTENtRkLrnQ869P8/vHMSZt4uEtqBpmXcTJ+hum+L2Sgb9FKqmz72q1FTNSmhaI/JNBmcdrfe/OtIN1BXDU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771982977; c=relaxed/simple; bh=kA1mfE+AsrElAzMzQJrdxYtO3XfQi9CscvrE9AHJ8ZM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=qUG06QVEsDYuaLMcYk+uI6jzk3Qpa326dWzgArImcUNa5mPBz3ZSCFlNNUzpkG6Bu1xlV3N4cS1QF5CYiZkX7gpkkBrpO5WTX/CF6+/8SWkWKg46P9X6u6oaO1OxybHmlXsqmN5fB68pdlbjhRD8VB1PI4q+kgwSA9i8lvuH5S0= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=UHOzh3WO; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="UHOzh3WO" Received: by smtp.kernel.org (Postfix) with ESMTPSA id A1218C19423; Wed, 25 Feb 2026 01:29:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1771982976; bh=kA1mfE+AsrElAzMzQJrdxYtO3XfQi9CscvrE9AHJ8ZM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=UHOzh3WOJmBrztPsseB+qnl0CgFPwBaplta/CajnSuI6Y5B4wM+BIYcjh8ej6VBWt SSqVhgUETXlQaG0NMpCZC6SEBtkEkRKwHX4tHME0X0DczxjxO9XMUFNDNhUFrEvhkj qQJ3As1669Qp5oeIZgtP21Q9OmUewdynisnaUEyE= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Dmitry Baryshkov , Konrad Dybcio , Alexey Minnekhanov , Bjorn Andersson , Sasha Levin Subject: [PATCH 6.19 150/781] arm64: dts: qcom: sdm630: fix gpu_speed_bin size Date: Tue, 24 Feb 2026 17:14:19 -0800 Message-ID: <20260225012403.343072598@linuxfoundation.org> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260225012359.695468795@linuxfoundation.org> References: <20260225012359.695468795@linuxfoundation.org> User-Agent: quilt/0.69 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 6.19-stable review patch. If anyone has any objections, please let me know. ------------------ From: Dmitry Baryshkov [ Upstream commit e814796dfcae8905682ac3ac2dd57f512a9f6726 ] Historically sdm630.dtsi has used 1 byte length for the gpu_speed_bin cell, although it spans two bytes (offset 5, size 7 bits). It was being accepted by the kernel because before the commit 7a06ef751077 ("nvmem: core: fix bit offsets of more than one byte") the kernel didn't have length check. After this commit nvmem core rejects QFPROM on sdm630 / sdm660, making GPU and USB unusable on those platforms. Set the size of the gpu_speed_bin cell to 2 bytes, fixing the parsing error. While we are at it, update the length to 8 bits as pointed out by Alexey Minnekhanov. Fixes: b190fb010664 ("arm64: dts: qcom: sdm630: Add sdm630 dts file") Signed-off-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio Reviewed-by: Alexey Minnekhanov Link: https://lore.kernel.org/r/20251211-sdm630-fix-gpu-v2-1-92f0e736dba0@oss.qualcomm.com Signed-off-by: Bjorn Andersson Signed-off-by: Sasha Levin --- arch/arm64/boot/dts/qcom/sdm630.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi index 8b1a45a4e56ed..b383e480a394d 100644 --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi @@ -598,8 +598,8 @@ qusb2_hstx_trim: hstx-trim@240 { }; gpu_speed_bin: gpu-speed-bin@41a0 { - reg = <0x41a2 0x1>; - bits = <5 7>; + reg = <0x41a2 0x2>; + bits = <5 8>; }; }; -- 2.51.0