From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BB246231A41; Wed, 25 Feb 2026 01:30:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771983024; cv=none; b=n6EA2q4J4mM0RTd/J0DTgBkfO+rRldZP91/QVW79a6xWRpgbAAw+1gyaHpCL5B9/j69HNefAh8VRODQq3wnOz7+tMAct5ur763FergDNcFazDUBJHe9DkNejt7MxMM/H2DtvQ+fn9VOXKHn+7PNFSPOMMC3qUVKHqt3RroJgbi8= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771983024; c=relaxed/simple; bh=U56c31LObUq5uYOaSeVTnzp+cVi8mBJ7DYk+JkX1l4s=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=aQ7M6Oo4hCuoo3J3zHylCwZ/Ue2DYrWvgIHQOyi4tcaMdABGzOZFDiZ6CNwPImcAMg/Pnvt/yOks94KVonwMusYRsxsRWCFlQT4/WFKQR/gGnXNJk7lTHlVXhGlU9WfsYYYq2xYKXpPkyh9X3Nt6MiLGgluObIXX7LG6/XR1YIA= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=TLCspHPe; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="TLCspHPe" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7CAC3C19424; Wed, 25 Feb 2026 01:30:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1771983024; bh=U56c31LObUq5uYOaSeVTnzp+cVi8mBJ7DYk+JkX1l4s=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=TLCspHPeu+74DWel41WTriOLZr2H3MkQ8vPwR6/AqWp4caML8fDHdIt1wELoM1x0M L5cpISa9x+mNeAZfNFQBwgOCw2q+Q8GFfBUkw4pAyUxDoTjl6H+791GLZVOHuGY6CC 34XXYzSa0Lb537Juqkd8bFrUHB53oS9GhoOtxkYI= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Krzysztof Kozlowski , Konrad Dybcio , Dmitry Baryshkov , Akhil P Oommen , Bjorn Andersson , Sasha Levin Subject: [PATCH 6.19 190/781] arm64: dts: qcom: sm6115: Add CX_MEM/DBGC GPU regions Date: Tue, 24 Feb 2026 17:14:59 -0800 Message-ID: <20260225012404.309831382@linuxfoundation.org> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260225012359.695468795@linuxfoundation.org> References: <20260225012359.695468795@linuxfoundation.org> User-Agent: quilt/0.69 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 6.19-stable review patch. If anyone has any objections, please let me know. ------------------ From: Konrad Dybcio [ Upstream commit 78c13dac18cf0e6f6cbc6ea85d4f967e6cca9562 ] Describe the GPU register regions, with the former existing but not being used much if at all on this silicon, and the latter containing various debugging levers generally related to dumping the state of the IP upon a crash. Fixes: 11750af256f8 ("arm64: dts: qcom: sm6115: Add GPU nodes") Reported-by: Krzysztof Kozlowski Closes: https://lore.kernel.org/linux-arm-msm/8a64f70b-8034-45e7-86a3-0015cf357132@oss.qualcomm.com/T/#m404f1425c36b61467760f058b696b8910340a063 Signed-off-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov Reviewed-by: Akhil P Oommen Link: https://lore.kernel.org/r/20251229-topic-6115_2290_gpu_dbgc-v1-3-4a24d196389c@oss.qualcomm.com Signed-off-by: Bjorn Andersson Signed-off-by: Sasha Levin --- arch/arm64/boot/dts/qcom/sm6115.dtsi | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi index 5e2032c26ea38..4dba724f2c756 100644 --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi @@ -1715,8 +1715,12 @@ usb_dwc3_ss: endpoint { gpu: gpu@5900000 { compatible = "qcom,adreno-610.0", "qcom,adreno"; - reg = <0x0 0x05900000 0x0 0x40000>; - reg-names = "kgsl_3d0_reg_memory"; + reg = <0x0 0x05900000 0x0 0x40000>, + <0x0 0x0599e000 0x0 0x1000>, + <0x0 0x05961000 0x0 0x800>; + reg-names = "kgsl_3d0_reg_memory", + "cx_mem", + "cx_dbgc"; /* There's no (real) GMU, so we have to handle quite a bunch of clocks! */ clocks = <&gpucc GPU_CC_GX_GFX3D_CLK>, -- 2.51.0