From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 668851D5ABA; Wed, 25 Feb 2026 01:32:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771983122; cv=none; b=qglj2hKWiki/sinZvprTElVT3AWYINDftvhOGcEN15RpPCTDTcMPseh+NI/CIZ+4tx2F4/DBrkEF6tHzLpyr9HerUzqnpjz2DaCiGGv6GhamTyHGOxLywhYMtqIkDLzYBYDeLhxi/78mduK2wOYgDmXZKXK3cQRBOA7UnQ9HD58= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771983122; c=relaxed/simple; bh=nGIQU+nqE8ywW9irk2CdMeFTpwUOI3E8LVxg5XJsJLY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=UQ/iH2qbW6LyWqbnTHpOYKxlp7m6y8iT7gcMC2XM+RLpKv87j1fTaXGPZX6Jnd7KHl2ooqWrVDulgkJleFuPnyKMsYEqhkBbT8RLIb4mychO7NxaHz2qC6dwLeG4IR3bB+QTny862zqVpKu5Zj0uz9i37KjjRrT7IcY/6TC7Ps0= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=rg9sWz37; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="rg9sWz37" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2EE2BC116D0; Wed, 25 Feb 2026 01:32:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1771983122; bh=nGIQU+nqE8ywW9irk2CdMeFTpwUOI3E8LVxg5XJsJLY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=rg9sWz37uQVDI+87txoOSib73WjCtKbv/tPhFpwNTr1BhzRTmaJd122nyYjKCcHzh 4CCZFIt8ATpG1b+Jvzt2euHkWmNOlgezpUzIWeCs87aP5pD5fqq1YLgInrMJN5Di5F IRAQHS8oDP/P1vTEPvGi6/icNA9EN1nv+W8nulfc= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Dmitry Baryshkov , Konrad Dybcio , Sasha Levin , Val Packett Subject: [PATCH 6.19 281/781] drm/msm/dpu: fix SSPP_UBWC_STATIC_CTRL programming on UBWC 5.x+ Date: Tue, 24 Feb 2026 17:16:30 -0800 Message-ID: <20260225012406.593571166@linuxfoundation.org> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260225012359.695468795@linuxfoundation.org> References: <20260225012359.695468795@linuxfoundation.org> User-Agent: quilt/0.69 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 6.19-stable review patch. If anyone has any objections, please let me know. ------------------ From: Dmitry Baryshkov [ Upstream commit 258b080dc280e927d200af51992048ec818d0491 ] Code in dpu_hw_sspp_setup_format() doesn't handle UBWC versions bigger than 4.0. Replace switch-case with if-else checks, making sure that the register is initialized on UBWC 5.x (and later) hosts. Fixes: c2577fc1740d ("drm/msm/dpu: Add support for SM8750") Tested-by: Val Packett # x1e80100-dell-latitude-7455 Signed-off-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio Patchwork: https://patchwork.freedesktop.org/patch/699280/ Link: https://lore.kernel.org/r/20260119-msm-ubwc-fixes-v4-4-0987acc0427f@oss.qualcomm.com Signed-off-by: Sasha Levin --- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c | 45 +++++++++++---------- 1 file changed, 24 insertions(+), 21 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c index 6ff4902fce08e..f275b14da4ffd 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c @@ -284,6 +284,7 @@ static void dpu_hw_sspp_setup_format(struct dpu_sw_pipe *pipe, if (fmt->fetch_mode != MDP_FETCH_LINEAR) { u32 hbb = ctx->ubwc->highest_bank_bit - 13; + u32 ctrl_val; if (MSM_FORMAT_IS_UBWC(fmt)) opmode |= MDSS_MDP_OP_BWC_EN; @@ -291,30 +292,32 @@ static void dpu_hw_sspp_setup_format(struct dpu_sw_pipe *pipe, DPU_REG_WRITE(c, SSPP_FETCH_CONFIG, DPU_FETCH_CONFIG_RESET_VALUE | hbb << 18); - switch (ctx->ubwc->ubwc_enc_version) { - case UBWC_1_0: + + if (ctx->ubwc->ubwc_enc_version == UBWC_1_0) { fast_clear = fmt->alpha_enable ? BIT(31) : 0; - DPU_REG_WRITE(c, ubwc_ctrl_off, - fast_clear | (ctx->ubwc->ubwc_swizzle & 0x1) | - BIT(8) | - (hbb << 4)); - break; - case UBWC_2_0: + ctrl_val = fast_clear | (ctx->ubwc->ubwc_swizzle & 0x1) | + BIT(8) | (hbb << 4); + } else if (ctx->ubwc->ubwc_enc_version == UBWC_2_0) { fast_clear = fmt->alpha_enable ? BIT(31) : 0; - DPU_REG_WRITE(c, ubwc_ctrl_off, - fast_clear | (ctx->ubwc->ubwc_swizzle) | - (hbb << 4)); - break; - case UBWC_3_0: - DPU_REG_WRITE(c, ubwc_ctrl_off, - BIT(30) | (ctx->ubwc->ubwc_swizzle) | - (hbb << 4)); - break; - case UBWC_4_0: - DPU_REG_WRITE(c, ubwc_ctrl_off, - MSM_FORMAT_IS_YUV(fmt) ? 0 : BIT(30)); - break; + ctrl_val = fast_clear | ctx->ubwc->ubwc_swizzle | (hbb << 4); + } else if (ctx->ubwc->ubwc_enc_version == UBWC_3_0) { + ctrl_val = BIT(30) | (ctx->ubwc->ubwc_swizzle) | (hbb << 4); + } else if (ctx->ubwc->ubwc_enc_version == UBWC_4_0) { + ctrl_val = MSM_FORMAT_IS_YUV(fmt) ? 0 : BIT(30); + } else if (ctx->ubwc->ubwc_enc_version <= UBWC_6_0) { + if (MSM_FORMAT_IS_YUV(fmt)) + ctrl_val = 0; + else if (MSM_FORMAT_IS_DX(fmt)) /* or FP16, but it's unsupported */ + ctrl_val = BIT(30); + else + ctrl_val = BIT(30) | BIT(31); + /* SDE also sets bits for lossy formats, but we don't support them yet */ + } else { + DRM_WARN_ONCE("Unsupported UBWC version %x\n", ctx->ubwc->ubwc_enc_version); + ctrl_val = 0; } + + DPU_REG_WRITE(c, ubwc_ctrl_off, ctrl_val); } opmode |= MDSS_MDP_OP_PE_OVERRIDE; -- 2.51.0