From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AB9343AF3B0; Sat, 28 Feb 2026 17:38:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772300301; cv=none; b=kMAsZnsF+QE0KrQl4l0r8WLAAk6DKhsOq7OYRWAlrawa1eV9XBpC7Ps6otXD7qGPv30rKiqvxQgQ+aD4hKqO4Wfat/bFz/2TXYVdZMr4fGRSeedvqy5QDnZb143M9eT7c40gVGa3F3g10SLUj+KALxiGzAHGLZ++a8cjBwLfPkE= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772300301; c=relaxed/simple; bh=/OMTTSzkMuyg7MouPley8iAmlYs+K6zFTS1Ol+cCZYk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=d9zGrJiADaJrt5GmNtbONbY6hWd3Dekkep697XWQBm4NVZQxCSUwPY/135s5BmOqU+zO5dkN2gcR5EEF4LXcECRddr0iI5rAVXGamn/JTNibx0aVCmjQvNuVn3znv+tRc1gUaQ+3ZgrGRvP2FI/rSqK8eLvBUq9lctNUjStVjy4= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=OW9WPEVK; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="OW9WPEVK" Received: by smtp.kernel.org (Postfix) with ESMTPSA id E4316C19424; Sat, 28 Feb 2026 17:38:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1772300301; bh=/OMTTSzkMuyg7MouPley8iAmlYs+K6zFTS1Ol+cCZYk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=OW9WPEVKr6M0AVfmYKGZko06nFeSAVFqDPVzboukrLmUnbK420XyDClDJYAkdwMi5 AU5gsC43wQQYPR/sLx+YbDCCScxacH5utyUP1ETIWrU29aR0zX7lC2g+MU2EcCNAu7 xwrY+Z4F8eeFxjgOVPh+qY1BoHUwVyxKbycngooVj+OgkjaNWIpqtJniqvaMJa2aKo wLwNuSW624tlnDLeqN4dMhcQLzGla2qalZ2oVjp8xiWWohqmt0nB7V5nWRT5AHQGPc U0qtsPpquagdqfhaxjROV+2z6Z2/Pu4dytw1tixctEniynJXzagG5EtStm6poTW2Hh uUFxgHlv5G2vw== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Alex Williamson , Patrick Bianchi , Bjorn Helgaas , Sasha Levin Subject: [PATCH 6.19 331/844] PCI: Mark ASM1164 SATA controller to avoid bus reset Date: Sat, 28 Feb 2026 12:24:04 -0500 Message-ID: <20260228173244.1509663-332-sashal@kernel.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260228173244.1509663-1-sashal@kernel.org> References: <20260228173244.1509663-1-sashal@kernel.org> Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit From: Alex Williamson [ Upstream commit beb2f81792a8a619e5122b6b24a374861309c54b ] User forums report issues when assigning ASM1164 SATA controllers to VMs, especially in configurations with multiple controllers. Logs show the device fails to retrain after bus reset. Reports suggest this is an issue across multiple platforms. The device indicates support for PM reset, therefore the device still has a viable function level reset mechanism. The reporting user confirms the device is well behaved in this use case with bus reset disabled. Reported-by: Patrick Bianchi Link: https://forum.proxmox.com/threads/problems-with-pcie-passthrough-with-two-identical-devices.149003/ Signed-off-by: Alex Williamson Signed-off-by: Bjorn Helgaas Link: https://patch.msgid.link/20260109000211.398300-1-alex.williamson@nvidia.com Signed-off-by: Sasha Levin --- drivers/pci/quirks.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index 6df78efd7f6dc..538ad85cf7c30 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -3791,6 +3791,16 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_CAVIUM, 0xa100, quirk_no_bus_reset); */ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TI, 0xb005, quirk_no_bus_reset); +/* + * Reports from users making use of PCI device assignment with ASM1164 + * controllers indicate an issue with bus reset where the device fails to + * retrain. The issue appears more common in configurations with multiple + * controllers. The device does indicate PM reset support (NoSoftRst-), + * therefore this still leaves a viable reset method. + * https://forum.proxmox.com/threads/problems-with-pcie-passthrough-with-two-identical-devices.149003/ + */ +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ASMEDIA, 0x1164, quirk_no_bus_reset); + static void quirk_no_pm_reset(struct pci_dev *dev) { /* -- 2.51.0