From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7FD493B095E; Sat, 28 Feb 2026 17:38:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772300306; cv=none; b=b6c6SjeexcbV/GFehd7NzyaFLhwL2ZkKkWb/Hc5QsGNhk/ZYly0Wy2eHnGs1+c9ZnP9gT4dd0Ni+btV3SS1CjZIIGV3/62G8Om+g5hnVooGQyO1qpJThdFd/AV/p5cKxMLeiAArrg6JYHniwKn/PoGKkv9O3248y0MazVVUFOPA= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772300306; c=relaxed/simple; bh=9fThhOT5K0o6OtqQqTxa5xfDf7abhccpMQ0273q90AQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=L9m1K37k4z6KgQITPMzqaHXtoivDVKxJ5iiRe3ba5m+lPUj7MKO1QEmRy2lif12PsrY8DuARANFOGmot8uLcXLU/8wixZ9wfgHChVU5mZziH0W6Dehhpbd8aNWloByW8JQb+Bft+TX15lNZm5LoaWmIkDPrYHQxqYWwYT0hDzcQ= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=fjHo1oEm; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="fjHo1oEm" Received: by smtp.kernel.org (Postfix) with ESMTPSA id B68D5C116D0; Sat, 28 Feb 2026 17:38:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1772300306; bh=9fThhOT5K0o6OtqQqTxa5xfDf7abhccpMQ0273q90AQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=fjHo1oEmOb9Iezjpe9Yfb46oAEm2LxyJiQpqyIUbxlTjlD/r9y88kozDn3fb6lebX b6a/liOxrdQE42awwl3z41SzMITHZMaYklOrghOuXZGvD0Rk29rwcjYLe7OfqlQE82 FNnyuipHHlG8iXpmzlODn4AiuZmplKXkpBNEMm8ThtHXUttQL2l+b1pQJP/uEHV8IT dORks61G0DF3tJJmH4RpfuXAQ7LHE1FWJa58wCFHr1PM/9Ys6AhG0QlZM9My4vjjpB O8z8jtw8ZsnTpX14/NBcXKTkDx+53+G+DsdVBHIqkIkUBmNi12aEm6yHTMRsn/a9Gh Y097Koirle2wA== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Johnny-CC Chang , Bjorn Helgaas , Manivannan Sadhasivam , Sasha Levin Subject: [PATCH 6.19 336/844] PCI: Mark Nvidia GB10 to avoid bus reset Date: Sat, 28 Feb 2026 12:24:09 -0500 Message-ID: <20260228173244.1509663-337-sashal@kernel.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260228173244.1509663-1-sashal@kernel.org> References: <20260228173244.1509663-1-sashal@kernel.org> Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit From: Johnny-CC Chang [ Upstream commit c81a2ce6b6a844d1a57d2a69833a9d0f00403f00 ] After asserting Secondary Bus Reset to downstream devices via a GB10 Root Port, the link may not retrain correctly, e.g., the link may retrain with a lower lane count or config accesses to downstream devices may fail. Prevent use of Secondary Bus Reset for devices below GB10. Signed-off-by: Johnny-CC Chang [bhelgaas: drop pci_ids.h update (only used once), update commit log] Signed-off-by: Bjorn Helgaas Reviewed-by: Manivannan Sadhasivam Link: https://patch.msgid.link/20251113084441.2124737-1-Johnny-CC.Chang@mediatek.com Signed-off-by: Sasha Levin --- drivers/pci/quirks.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index 4463a2da0441f..90676cb2fd10b 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -3748,6 +3748,14 @@ static void quirk_no_bus_reset(struct pci_dev *dev) dev->dev_flags |= PCI_DEV_FLAGS_NO_BUS_RESET; } +/* + * After asserting Secondary Bus Reset to downstream devices via a GB10 + * Root Port, the link may not retrain correctly. + * https://lore.kernel.org/r/20251113084441.2124737-1-Johnny-CC.Chang@mediatek.com + */ +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NVIDIA, 0x22CE, quirk_no_bus_reset); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NVIDIA, 0x22D0, quirk_no_bus_reset); + /* * Some NVIDIA GPU devices do not work with bus reset, SBR needs to be * prevented for those affected devices. -- 2.51.0