From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2A48D48AE15; Sat, 28 Feb 2026 17:34:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772300050; cv=none; b=Wl9dvHzLoUa28vbeE6cpoMpAglIRw4j2Se0UVqbiv1GOOM0Agx0Qlmky+7Gpc4ORc+CynjclxDAqyBuNrmMFQqtEBJGyp04sL9NEV6+u+FoRByGrjaAltrIHkmLDcqafi5a9//DxQTJemSC92YVKiM6g3uKzAYzWCBRoLulLv/4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772300050; c=relaxed/simple; bh=LXfydIHbtyS7K6xEZPDR93d+R5QphdM5i5xDyAVm46E=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=qhED6S7pDnmhTsBrSY2WLBVGsXfdi1tfFb5UTW9zYfTLdkPhM8Fg9we7UyuTd+vHwU623JpAfGi28YP9HCzvWTT9s5FheV7E6TUyJhawiwGOnd2vGUDsxX0lVZXQ1E1EWYaevnon35xSBCM1aFY4LWcUOb+bxVVkz/fRO+azRLc= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=ZQ7FX2te; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ZQ7FX2te" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7323CC116D0; Sat, 28 Feb 2026 17:34:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1772300050; bh=LXfydIHbtyS7K6xEZPDR93d+R5QphdM5i5xDyAVm46E=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ZQ7FX2teRFLyTfSD6AePp2UXw17Cj1FHbAlz3TmntVSsTq1eI957kJzbwXih6yRn8 T8Crvy7z/18LEI2Zkg/37W7rdyCAyyDB29fHrFWP3mw7bG00gKvkjPfk0Apk6g2qRn bW2eh1WLxHjDgyVgaf1IUXrpotXUVuqxjPOS/Y0i7KgJYEokLF2GA0gzYU0o7afWoB xi4pcKqjdXMiWLht02oZn1N+InPFxzjQfLnTBl1eLhs2UvXViWnlDyf1c5TrsdcI3j L3Pn6j5JiMVhApOr6kPBR6WZPA9jEAgFRRORioEmPyJJJL9/V3j5Ya64kUHcJ9w/EU /B4683EvEtuFQ== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Hou Wenlong , Juergen Gross , Sasha Levin Subject: [PATCH 6.19 063/844] x86/xen/pvh: Enable PAE mode for 32-bit guest only when CONFIG_X86_PAE is set Date: Sat, 28 Feb 2026 12:19:36 -0500 Message-ID: <20260228173244.1509663-64-sashal@kernel.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260228173244.1509663-1-sashal@kernel.org> References: <20260228173244.1509663-1-sashal@kernel.org> Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit From: Hou Wenlong [ Upstream commit db9aded979b491a24871e1621cd4e8822dbca859 ] The PVH entry is available for 32-bit KVM guests, and 32-bit KVM guests do not depend on CONFIG_X86_PAE. However, mk_early_pgtbl_32() builds different pagetables depending on whether CONFIG_X86_PAE is set. Therefore, enabling PAE mode for 32-bit KVM guests without CONFIG_X86_PAE being set would result in a boot failure during CR3 loading. Signed-off-by: Hou Wenlong Reviewed-by: Juergen Gross Signed-off-by: Juergen Gross Message-ID: Signed-off-by: Sasha Levin --- arch/x86/platform/pvh/head.S | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/x86/platform/pvh/head.S b/arch/x86/platform/pvh/head.S index 344030c1a81d4..53ee2d53fcf8e 100644 --- a/arch/x86/platform/pvh/head.S +++ b/arch/x86/platform/pvh/head.S @@ -91,10 +91,12 @@ SYM_CODE_START(pvh_start_xen) leal rva(early_stack_end)(%ebp), %esp +#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE) /* Enable PAE mode. */ mov %cr4, %eax orl $X86_CR4_PAE, %eax mov %eax, %cr4 +#endif #ifdef CONFIG_X86_64 /* Enable Long mode. */ -- 2.51.0