From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1C023414910; Sat, 28 Feb 2026 17:45:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772300712; cv=none; b=TsRlID79VTYoJOgvqhSVSqDwyJB7zOy+Yfj0CPJJ7sg5AjtRP4D7GeGH3YCaLZLO+c3aKbpvYQU1IHhr29o2SmTW517OASFsthlMxrZJg4SKlxmOTfXo/llGIi4nfNOEKCfBKH4Zyzh+38ogiAKPcJfg2sDA46ucROG+Qe6OGT0= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772300712; c=relaxed/simple; bh=Y8XpSHB5fFtmQz5KqQGt2nNLe7eX8r+4h6XtvAwSy/o=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ceGtIuHuaZDtPrSAg+aiVOmnKa6go6MTs2S9wxJh1Jv4AAfKyMXMPhfNkBpV0EXgTo+TSJHfe1EK1RYNmvOEKElzRKHsjdZEqOQoUWp3jZUbauUEhj/YFI2C9zu0zutDK8hqUG6pdQLk1F/LVEJOxaNI5N9CJBaXa1AjwA4FGDY= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=K6Xkbv5i; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="K6Xkbv5i" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4FC3DC19423; Sat, 28 Feb 2026 17:45:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1772300712; bh=Y8XpSHB5fFtmQz5KqQGt2nNLe7eX8r+4h6XtvAwSy/o=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=K6Xkbv5iqU6Ufss/BFj+tEyPy3J0ryWiixmWqB6R/uDrTUfHyjpLefQUPS/pJrX1J Iq4ID0ZfyawAJYiOHZBoM8K1RCoRu+KZPZZ3gaK0Z+DapdmFkQWphFIEIpzNoCXwJn 2qwZOgNfsvx/6q6QzfJez7Ccc5IvjrdcSMOWKsuT3kO2FI3M4d4ro8AL9HsjIujJZk YfQ7KG0pDpGVyZpKpLvIvwVStjYleXLOC8Ewj5VMRUCUaJZyWroYH9ogCBMc6LgFbh Xvx7oNAh1JwPO1ssWLo0O3BMqjJnqcefwl6oTCdcqSiUBzqsyRxTuNFhDtaBFiZ1EX tB6iKrx2IR+Ng== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Andrea Scian , stable@kernel.org, Miquel Raynal , Sasha Levin Subject: [PATCH 6.19 747/844] mtd: rawnand: pl353: Fix software ECC support Date: Sat, 28 Feb 2026 12:31:00 -0500 Message-ID: <20260228173244.1509663-748-sashal@kernel.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260228173244.1509663-1-sashal@kernel.org> References: <20260228173244.1509663-1-sashal@kernel.org> Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit From: Andrea Scian [ Upstream commit 89b831ebdaca0df4ca3b226f7e7a1d1db1629060 ] We need to set also write_page_raw in ecc structure to allow choosing SW ECC instead of HW one, otherwise write operation fail. Fixes: 08d8c62164a322 ("mtd: rawnand: pl353: Add support for the ARM PL353 SMC NAND controller") Signed-off-by: Andrea Scian Cc: stable@kernel.org Signed-off-by: Miquel Raynal Signed-off-by: Sasha Levin --- drivers/mtd/nand/raw/pl35x-nand-controller.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mtd/nand/raw/pl35x-nand-controller.c b/drivers/mtd/nand/raw/pl35x-nand-controller.c index 11bd90e3f18cb..7f012b7c3eaec 100644 --- a/drivers/mtd/nand/raw/pl35x-nand-controller.c +++ b/drivers/mtd/nand/raw/pl35x-nand-controller.c @@ -976,6 +976,7 @@ static int pl35x_nand_attach_chip(struct nand_chip *chip) fallthrough; case NAND_ECC_ENGINE_TYPE_NONE: case NAND_ECC_ENGINE_TYPE_SOFT: + chip->ecc.write_page_raw = nand_monolithic_write_page_raw; break; case NAND_ECC_ENGINE_TYPE_ON_HOST: ret = pl35x_nand_init_hw_ecc_controller(nfc, chip); -- 2.51.0