From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 489B64A2E39; Sat, 28 Feb 2026 17:34:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772300079; cv=none; b=aHJpRCnDVrbyw3d/PpFGT/sAGRwCWerz3CCPHMgIalWH4WTlK5OagSkDQv6mxmY2OSb7/iLCJ+fBg19SbIOZEAvEVsUWYWvo+eoi31jVzLmWZkeJ1sui1Q2riN1XohESYsU+kwowvsk+jOVovtSxm9GvkdHjgjJXbTcShrY91vQ= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772300079; c=relaxed/simple; bh=H5FE0biINAPqcQj2mRaD4fEdEN96p45GPqIJtXKgFHE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=nBlqcn8I3RTT4nVPNXhPQ9SmMkjCN1brYOS8bjD6wvUuxbGt8OK3MHZEtoull14oFUsGKp+2qfCRaURft6pvNxBa5ZEQ+gRehYK0djr17UYybkwBbfhFtVmd2CKstJPbYt2PX1eTd8eYKgKUEzm3G8DH8gqelXdYTqaspSCRF2Y= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=nUnQtGUE; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="nUnQtGUE" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7DB5AC19423; Sat, 28 Feb 2026 17:34:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1772300079; bh=H5FE0biINAPqcQj2mRaD4fEdEN96p45GPqIJtXKgFHE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=nUnQtGUE0eaexUArwnAWNu6+S3MNTA0y50chrwaLSl98NWMM0c775NghL3TUhh9GI 1WJSi8dOnaHoeF+LBfxxY2Udi+gmNE5aiZogPdtPs67iQC+oHwjo8UV+cL6NDvey/K q0f9r+Wr1WYSz9F2W3FmvBGe7KP0t/TALlqwMlX4bP61SehYp9HXmKHM5kqLGK3twl N8KtWZa4WZQJ0dc52CLNSHzR7S2gm5atrHb9c5OgajALldo0QkqUZiIM5z2wfG8FAS 7sTcp2z3lSJ6JWGbYqZ6zMkj7PXSOhd1ZstFSu+uc7fq4sZzIKO7UgscJT0NqDIZop nKn7/lbY/nqAw== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Martin Schiller , "Peter Zijlstra (Intel)" , Dapeng Mi , Sasha Levin Subject: [PATCH 6.19 093/844] perf/x86/msr: Add Airmont NP Date: Sat, 28 Feb 2026 12:20:06 -0500 Message-ID: <20260228173244.1509663-94-sashal@kernel.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260228173244.1509663-1-sashal@kernel.org> References: <20260228173244.1509663-1-sashal@kernel.org> Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit From: Martin Schiller [ Upstream commit 63dbadcafc1f4d1da796a8e2c0aea1e561f79ece ] Like Airmont, the Airmont NP (aka Intel / MaxLinear Lightning Mountain) supports SMI_COUNT MSR. Signed-off-by: Martin Schiller Signed-off-by: Peter Zijlstra (Intel) Reviewed-by: Dapeng Mi Link: https://patch.msgid.link/20251124074846.9653-2-ms@dev.tdt.de Signed-off-by: Sasha Levin --- arch/x86/events/msr.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/x86/events/msr.c b/arch/x86/events/msr.c index 7f5007a4752a1..8052596b85036 100644 --- a/arch/x86/events/msr.c +++ b/arch/x86/events/msr.c @@ -78,6 +78,7 @@ static bool test_intel(int idx, void *data) case INTEL_ATOM_SILVERMONT: case INTEL_ATOM_SILVERMONT_D: case INTEL_ATOM_AIRMONT: + case INTEL_ATOM_AIRMONT_NP: case INTEL_ATOM_GOLDMONT: case INTEL_ATOM_GOLDMONT_D: -- 2.51.0