From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2BDCB4611C5; Sat, 28 Feb 2026 17:54:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772301288; cv=none; b=AwGIa2MFt0//8DGZQlvQ3g25Pmnu44ktUsAEvnjqU6ZHvQjrpc4ZM1OaMsdjPq8Tdgx3+j1Ipv73GExEhd0o7NncXsydfzEx69d86O4t3sA7po2oqDKabeNKvdlCcpeb6LvY9eXcc72d038vRMWvWihZlwX5WcykquD6vhECKuI= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772301288; c=relaxed/simple; bh=H2Myczd7wVdv2VIWlFGH8orvi+Wa+W+H3eqXHDmNVec=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=FDGE1r28wf5NaVT2zvTKqleADE+ZC6KrDltQNq4ZjOpa6k7WNIDHmIjQNuhV0E1so9Ok1EAsU9mo1y0Ji07HOiaXRSI8hUfreUhUq5VesjpDgltofgKQZtxtXJNqnDQAZgCY/rT8JUi6kFVjHOPod8mKoUKMuwKl9RP/wFZ1QOw= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=phbgBE+t; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="phbgBE+t" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 63507C19424; Sat, 28 Feb 2026 17:54:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1772301288; bh=H2Myczd7wVdv2VIWlFGH8orvi+Wa+W+H3eqXHDmNVec=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=phbgBE+tT2/qi2Tx+JFNlwYVJ7limnLnlw/tHMf1In9HiEcUpO5gZAwAmYLGZxNJB n5EejsY4NLA9wFUDEjkMlRdLkY0eGJsUoqpH0uYr0LZk4n6I5LrX0G/H+9xgL0uCWh Z9p5x5KbvKuBrqkoMakFLUT21TnwGbEsvPYTu40FxcQo1Aa8sUSHS4yeFHzXs8+Cyv DyNka9PQBWwfsNI9ch6aBlTJmyd/ogRSmm5TlrYU/gnHygy71BjDipTvHqumacAepm jKtOop2mO8uqSMJwgAAACLQFXqaPKOINxpVZAS+Q8jCFVQXuV7Gz6mpcX5q2EMs9gD vRoVfTQlzhgxg== From: Sasha Levin To: patches@lists.linux.dev Cc: Niklas Cassel , Manivannan Sadhasivam , Shawn Lin , stable@vger.kernel.org, Sasha Levin Subject: [PATCH 6.18 472/752] Revert "PCI: dw-rockchip: Don't wait for link since we can detect Link Up" Date: Sat, 28 Feb 2026 12:43:03 -0500 Message-ID: <20260228174750.1542406-472-sashal@kernel.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260228174750.1542406-1-sashal@kernel.org> References: <20260228174750.1542406-1-sashal@kernel.org> Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit From: Niklas Cassel [ Upstream commit fc6298086bfacaa7003b0bd1da4e4f42b29f7d77 ] This reverts commit ec9fd499b9c60a187ac8d6414c3c343c77d32e42. While this fake hotplugging was a nice idea, it has shown that this feature does not handle PCIe switches correctly: pci_bus 0004:43: busn_res: can not insert [bus 43-41] under [bus 42-41] (conflicts with (null) [bus 42-41]) pci_bus 0004:43: busn_res: [bus 43-41] end is updated to 43 pci_bus 0004:43: busn_res: can not insert [bus 43] under [bus 42-41] (conflicts with (null) [bus 42-41]) pci 0004:42:00.0: devices behind bridge are unusable because [bus 43] cannot be assigned for them pci_bus 0004:44: busn_res: can not insert [bus 44-41] under [bus 42-41] (conflicts with (null) [bus 42-41]) pci_bus 0004:44: busn_res: [bus 44-41] end is updated to 44 pci_bus 0004:44: busn_res: can not insert [bus 44] under [bus 42-41] (conflicts with (null) [bus 42-41]) pci 0004:42:02.0: devices behind bridge are unusable because [bus 44] cannot be assigned for them pci_bus 0004:45: busn_res: can not insert [bus 45-41] under [bus 42-41] (conflicts with (null) [bus 42-41]) pci_bus 0004:45: busn_res: [bus 45-41] end is updated to 45 pci_bus 0004:45: busn_res: can not insert [bus 45] under [bus 42-41] (conflicts with (null) [bus 42-41]) pci 0004:42:06.0: devices behind bridge are unusable because [bus 45] cannot be assigned for them pci_bus 0004:46: busn_res: can not insert [bus 46-41] under [bus 42-41] (conflicts with (null) [bus 42-41]) pci_bus 0004:46: busn_res: [bus 46-41] end is updated to 46 pci_bus 0004:46: busn_res: can not insert [bus 46] under [bus 42-41] (conflicts with (null) [bus 42-41]) pci 0004:42:0e.0: devices behind bridge are unusable because [bus 46] cannot be assigned for them pci_bus 0004:42: busn_res: [bus 42-41] end is updated to 46 pci_bus 0004:42: busn_res: can not insert [bus 42-46] under [bus 41] (conflicts with (null) [bus 41]) pci 0004:41:00.0: devices behind bridge are unusable because [bus 42-46] cannot be assigned for them pcieport 0004:40:00.0: bridge has subordinate 41 but max busn 46 During the initial scan, PCI core doesn't see the switch and since the Root Port is not hot plug capable, the secondary bus number gets assigned as the subordinate bus number. This means, the PCI core assumes that only one bus will appear behind the Root Port since the Root Port is not hot plug capable. This works perfectly fine for PCIe endpoints connected to the Root Port, since they don't extend the bus. However, if a PCIe switch is connected, then there is a problem when the downstream busses starts showing up and the PCI core doesn't extend the subordinate bus number and bridge resources after initial scan during boot. The long term plan is to migrate this driver to the upcoming pwrctrl APIs that are supposed to handle this problem elegantly. Suggested-by: Manivannan Sadhasivam Signed-off-by: Niklas Cassel Signed-off-by: Manivannan Sadhasivam Tested-by: Shawn Lin Acked-by: Shawn Lin Cc: stable@vger.kernel.org Link: https://patch.msgid.link/20251222064207.3246632-9-cassel@kernel.org Signed-off-by: Sasha Levin --- drivers/pci/controller/dwc/pcie-dw-rockchip.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/pci/controller/dwc/pcie-dw-rockchip.c b/drivers/pci/controller/dwc/pcie-dw-rockchip.c index 79e55b9833e4a..7be6351686e21 100644 --- a/drivers/pci/controller/dwc/pcie-dw-rockchip.c +++ b/drivers/pci/controller/dwc/pcie-dw-rockchip.c @@ -549,7 +549,6 @@ static int rockchip_pcie_configure_rc(struct platform_device *pdev, pp = &rockchip->pci.pp; pp->ops = &rockchip_pcie_host_ops; - pp->use_linkup_irq = true; ret = dw_pcie_host_init(pp); if (ret) { -- 2.51.0