From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 843641E4AF; Sun, 1 Mar 2026 01:18:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772327926; cv=none; b=I5j0q4KouCgGtGOAgfUy8qpl1SHnOhP/cjCEoK9oyAXiYjZG7VJwriKVenU7MQcJaY0Ix3mpbeYcqQVjw5wD7dAXqhtaaGlnVTUKk1F67g3ix+BietazcsuB9mkrBW7PRSGfFnpd5vaBluGGA/wALUyK1svZe8ilvBVitr1Dl4g= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772327926; c=relaxed/simple; bh=VLs1aFZDCCMCW/TxbttSUnBnh6tTst6Y3f0HQUuR1ZI=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=JGSemk2M02DPPdBI2LOFMxuagt26mJQbZ6Es01fU7IOA098WNRAfDYpM6NxP7qGhrNIki1Gz0Ip3ootvSLv0soEBwKL2uQWDgvoTpm8P414lucui+xdXaibSFsV38XBCylT+exTINCviXfOnwzHh3lTauLvq3UWzBMXGZhyW5Ug= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=c5rAyCfh; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="c5rAyCfh" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 90A05C19424; Sun, 1 Mar 2026 01:18:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1772327926; bh=VLs1aFZDCCMCW/TxbttSUnBnh6tTst6Y3f0HQUuR1ZI=; h=From:To:Cc:Subject:Date:From; b=c5rAyCfhh4NQxKSRS6ZJDWG8WiZpAcgPOfdRWlHuR1dU11XhVqpFxte/oOg/hCsrz sOFLEGMqkWy4UW1eDtBEoQCKURQfRSD8N2fdcwNABjgjVgQnKxtZ3S60zA6sJrYW1K 1INID7Y/odfJuCZBHkTBa/BkbrNFb3ZXiaGifCMnts4RvB8fM5emWoKQMSbuOt7/d9 IC2yzNeuAGtCdb5fN3sxREP6uNVpJAdcai2I+TXmO4VS6Ku54a/ms4jEiKdngZKRzY +SdQLofm1g/bvMphJcD5K7AqRWI60v1Wf1VDPMzFXR2k+/fJq5gi6dCfJgwXPumYiF tTDixn0t6HwDg== From: Sasha Levin To: stable@vger.kernel.org, abelvesa@kernel.org Cc: Dmitry Baryshkov , Bjorn Andersson , Abel Vesa , Vinod Koul , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org Subject: FAILED: Patch "phy: qcom: edp: Make the number of clocks flexible" failed to apply to 6.12-stable tree Date: Sat, 28 Feb 2026 20:18:44 -0500 Message-ID: <20260301011844.1673192-1-sashal@kernel.org> X-Mailer: git-send-email 2.51.0 Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Hint: ignore X-stable: review Content-Transfer-Encoding: 8bit The patch below does not apply to the 6.12-stable tree. If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to . Thanks, Sasha ------------------ original commit in Linus's tree ------------------ >From 7d51b709262c5aa31d2b9cd31444112c1b2dae03 Mon Sep 17 00:00:00 2001 From: Abel Vesa Date: Wed, 24 Dec 2025 12:53:28 +0200 Subject: [PATCH] phy: qcom: edp: Make the number of clocks flexible On X Elite, the DP PHY needs another clock called ref, while all other platforms do not. The current X Elite devices supported upstream work fine without this clock, because the boot firmware leaves this clock enabled. But we should not rely on that. Also, even though this change breaks the ABI, it is needed in order to make the driver disables this clock along with the other ones, for a proper bring-down of the entire PHY. So in order to handle these clocks on different platforms, make the driver get all the clocks regardless of how many there are provided. Cc: stable@vger.kernel.org # v6.10 Fixes: db83c107dc29 ("phy: qcom: edp: Add v6 specific ops and X1E80100 platform support") Reviewed-by: Dmitry Baryshkov Reviewed-by: Bjorn Andersson Signed-off-by: Abel Vesa Link: https://patch.msgid.link/20251224-phy-qcom-edp-add-missing-refclk-v5-2-3f45d349b5ac@oss.qualcomm.com Signed-off-by: Vinod Koul --- drivers/phy/qualcomm/phy-qcom-edp.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-edp.c b/drivers/phy/qualcomm/phy-qcom-edp.c index f1b51018683d5..06a08c9ea0f70 100644 --- a/drivers/phy/qualcomm/phy-qcom-edp.c +++ b/drivers/phy/qualcomm/phy-qcom-edp.c @@ -103,7 +103,9 @@ struct qcom_edp { struct phy_configure_opts_dp dp_opts; - struct clk_bulk_data clks[2]; + struct clk_bulk_data *clks; + int num_clks; + struct regulator_bulk_data supplies[2]; bool is_edp; @@ -218,7 +220,7 @@ static int qcom_edp_phy_init(struct phy *phy) if (ret) return ret; - ret = clk_bulk_prepare_enable(ARRAY_SIZE(edp->clks), edp->clks); + ret = clk_bulk_prepare_enable(edp->num_clks, edp->clks); if (ret) goto out_disable_supplies; @@ -885,7 +887,7 @@ static int qcom_edp_phy_exit(struct phy *phy) { struct qcom_edp *edp = phy_get_drvdata(phy); - clk_bulk_disable_unprepare(ARRAY_SIZE(edp->clks), edp->clks); + clk_bulk_disable_unprepare(edp->num_clks, edp->clks); regulator_bulk_disable(ARRAY_SIZE(edp->supplies), edp->supplies); return 0; @@ -1092,11 +1094,9 @@ static int qcom_edp_phy_probe(struct platform_device *pdev) if (IS_ERR(edp->pll)) return PTR_ERR(edp->pll); - edp->clks[0].id = "aux"; - edp->clks[1].id = "cfg_ahb"; - ret = devm_clk_bulk_get(dev, ARRAY_SIZE(edp->clks), edp->clks); - if (ret) - return ret; + edp->num_clks = devm_clk_bulk_get_all(dev, &edp->clks); + if (edp->num_clks < 0) + return dev_err_probe(dev, edp->num_clks, "failed to get clocks\n"); edp->supplies[0].supply = "vdda-phy"; edp->supplies[1].supply = "vdda-pll"; -- 2.51.0