From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0BEAC243969; Sun, 1 Mar 2026 01:44:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772329444; cv=none; b=str/BoGx9HPQ5bHSKgudheAC+jMWqVCwpAul7WDpo9hvRFpAvgeYt/FRPjUcZB7kFri3SnJ8eduTa1/yv+2p//1IN5eDj/AfmAwBM/9U5eq+ARHjyDz+v0y1nKk84RI0N17kDAItGymCGycKlJo1lMe2gc5GHLEyyFRTi6BFJz4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772329444; c=relaxed/simple; bh=sqJwxOYRU4RYiHgIubPhhh/TKdbi/iEdg8l2jcB+iYY=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=AryBY5aAWgm6L+ZlNoQ5tkxXVfEL2J7Ss2/tL1j/v4XsEfC0pGAKvKNg8Ymy5cAIVQxyI+03SyBMXMrI+RHnz4YRPJfiDX+MgRh2Ydrc2tjWO60SgRY9bZ49RidjPv5IXwvSBqLuZU+AMvdRavpsZb8m87FVj7BDv1Y0J+r3OOI= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=eA0ra672; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="eA0ra672" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 32DC1C19421; Sun, 1 Mar 2026 01:44:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1772329443; bh=sqJwxOYRU4RYiHgIubPhhh/TKdbi/iEdg8l2jcB+iYY=; h=From:To:Cc:Subject:Date:From; b=eA0ra672MJXw31wFvcOv9ESDMz8OGkpcTyXCAEBTVYNM/a7jDn7xooiWiIuyrE8iV fEWQjCrgJ3nL3R9nRa+92WePhZSCnWiBfvZm5Jp+8QH+OoDDV+Nj8uldpIXwwC1P6V UHfMAMsknCdCQiSTDqRr1sKqAHSezAEPl1jmVjFZuyJxUIJSEgtwJNKlX7BAUMeJqd 2nPCb8QjNLdXRaFQJ7n25dpRl1XvYQcwuqfB1R6Q5gf/9ky9QJ0MxcqConzNpMnPfV eR/znPmMTA3Qc09v6NX0hdTmrORK5v8WsfP4Xc/Cnm7Z3Ft9lbOed6EWluSLSbUBTW HNlMXrle48S+w== From: Sasha Levin To: stable@vger.kernel.org, haotienh@nvidia.com Cc: stable , Wayne Chang , Greg Kroah-Hartman , linux-usb@vger.kernel.org, linux-tegra@vger.kernel.org Subject: FAILED: Patch "usb: gadget: tegra-xudc: Add handling for BLCG_COREPLL_PWRDN" failed to apply to 6.1-stable tree Date: Sat, 28 Feb 2026 20:44:01 -0500 Message-ID: <20260301014402.1706142-1-sashal@kernel.org> X-Mailer: git-send-email 2.51.0 Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Hint: ignore X-stable: review Content-Transfer-Encoding: 8bit The patch below does not apply to the 6.1-stable tree. If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to . Thanks, Sasha ------------------ original commit in Linus's tree ------------------ >From 1132e90840abf3e7db11f1d28199e9fbc0b0e69e Mon Sep 17 00:00:00 2001 From: Haotien Hsu Date: Sat, 24 Jan 2026 01:31:21 +0800 Subject: [PATCH] usb: gadget: tegra-xudc: Add handling for BLCG_COREPLL_PWRDN The COREPLL_PWRDN bit in the BLCG register must be set when the XUSB device controller is powergated and cleared when it is unpowergated. If this bit is not explicitly controlled, the core PLL may remain in an incorrect power state across suspend/resume or ELPG transitions. Therefore, update the driver to explicitly control this bit during powergate transitions. Fixes: 49db427232fe ("usb: gadget: Add UDC driver for tegra XUSB device mode controller") Cc: stable Signed-off-by: Haotien Hsu Signed-off-by: Wayne Chang Link: https://patch.msgid.link/20260123173121.4093902-1-waynec@nvidia.com Signed-off-by: Greg Kroah-Hartman --- drivers/usb/gadget/udc/tegra-xudc.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/drivers/usb/gadget/udc/tegra-xudc.c b/drivers/usb/gadget/udc/tegra-xudc.c index 9d2007f448c04..7f7251c10e952 100644 --- a/drivers/usb/gadget/udc/tegra-xudc.c +++ b/drivers/usb/gadget/udc/tegra-xudc.c @@ -3392,17 +3392,18 @@ static void tegra_xudc_device_params_init(struct tegra_xudc *xudc) { u32 val, imod; + val = xudc_readl(xudc, BLCG); if (xudc->soc->has_ipfs) { - val = xudc_readl(xudc, BLCG); val |= BLCG_ALL; val &= ~(BLCG_DFPCI | BLCG_UFPCI | BLCG_FE | BLCG_COREPLL_PWRDN); val |= BLCG_IOPLL_0_PWRDN; val |= BLCG_IOPLL_1_PWRDN; val |= BLCG_IOPLL_2_PWRDN; - - xudc_writel(xudc, val, BLCG); + } else { + val &= ~BLCG_COREPLL_PWRDN; } + xudc_writel(xudc, val, BLCG); if (xudc->soc->port_speed_quirk) tegra_xudc_limit_port_speed(xudc); @@ -3953,6 +3954,7 @@ static void tegra_xudc_remove(struct platform_device *pdev) static int __maybe_unused tegra_xudc_powergate(struct tegra_xudc *xudc) { unsigned long flags; + u32 val; dev_dbg(xudc->dev, "entering ELPG\n"); @@ -3965,6 +3967,10 @@ static int __maybe_unused tegra_xudc_powergate(struct tegra_xudc *xudc) spin_unlock_irqrestore(&xudc->lock, flags); + val = xudc_readl(xudc, BLCG); + val |= BLCG_COREPLL_PWRDN; + xudc_writel(xudc, val, BLCG); + clk_bulk_disable_unprepare(xudc->soc->num_clks, xudc->clks); regulator_bulk_disable(xudc->soc->num_supplies, xudc->supplies); -- 2.51.0