From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DF7A5244670 for ; Sun, 1 Mar 2026 01:44:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772329497; cv=none; b=uJKUAhojg3ilRxD89Pmq2RUNFPlshHQHIAGuV7WskrSFUV1W+EciZDMhRG1aCggbDR/3fTd2Ct3nDzs82i9dtOeJDSfrdtJDKBG1qDvwCg6urANI8nVkK5v1xabcp3nAoKxJje5m2aypxG5eylh8XnprGOEbArTcuwb7429uKM8= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772329497; c=relaxed/simple; bh=5FMDaDjdpb2VCefNYqWysWzqQCbjFhhtrBy4heq23YQ=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=aff1sIvH7i9AbP5hpLojcAuXrQdN15INNI6/Vdvzt0TCiiOm/3Fv7QoTcFaVGZa+NuDG2toHgYR2HuTXNi6JXfGzOj0dvg2tFvTUKYjTUmcwRH3B0N7RWSzPgnqS8DvuQJ6+0o8h4F7D/ysyr3oNsL2dF+A5yV02tKO8f1FD1Mo= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=YgBPaqqh; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="YgBPaqqh" Received: by smtp.kernel.org (Postfix) with ESMTPSA id DB247C19421; Sun, 1 Mar 2026 01:44:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1772329497; bh=5FMDaDjdpb2VCefNYqWysWzqQCbjFhhtrBy4heq23YQ=; h=From:To:Cc:Subject:Date:From; b=YgBPaqqh1z4LJnJSA9Vxybh6Q/tGVz30beEH1KUelQYsm5e6HhyHEwlR4L80miGns X3s/HmraFt8GpQjPMzSjgUuiyk4eEK7KXEnsqJ76fTr4xoRL2rbDBsW4/mGvWTDUxa sV39rgqvEzPTarWT00KhhynO5I1BOGogw0dbSEGBoF58e3SYn4b5KvenzpepA8D40v +crEW6hJHShcWyzZllDPBo/B5XX/FzYN4bX6lVnLR5O7wYADHGVsrdX6AcUbzh/YZN TRTM/rton5GvpDcewkpU0/Phv6bFdIHU4FWOZot1meFgUTHmkFkxJDV0uez8aDcNI0 k0QJMdEivGwxg== From: Sasha Levin To: stable@vger.kernel.org, elver@google.com Cc: Boqun Feng , David Laight , Will Deacon , linux-arm-kernel@lists.infradead.org Subject: FAILED: Patch "arm64: Fix non-atomic __READ_ONCE() with CONFIG_LTO=y" failed to apply to 6.1-stable tree Date: Sat, 28 Feb 2026 20:44:55 -0500 Message-ID: <20260301014455.1707393-1-sashal@kernel.org> X-Mailer: git-send-email 2.51.0 Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Hint: ignore X-stable: review Content-Transfer-Encoding: 8bit The patch below does not apply to the 6.1-stable tree. If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to . Thanks, Sasha ------------------ original commit in Linus's tree ------------------ >From bb0c99e08ab9aa6d04b40cb63c72db9950d51749 Mon Sep 17 00:00:00 2001 From: Marco Elver Date: Fri, 30 Jan 2026 14:28:24 +0100 Subject: [PATCH] arm64: Fix non-atomic __READ_ONCE() with CONFIG_LTO=y The implementation of __READ_ONCE() under CONFIG_LTO=y incorrectly qualified the fallback "once" access for types larger than 8 bytes, which are not atomic but should still happen "once" and suppress common compiler optimizations. The cast `volatile typeof(__x)` applied the volatile qualifier to the pointer type itself rather than the pointee. This created a volatile pointer to a non-volatile type, which violated __READ_ONCE() semantics. Fix this by casting to `volatile typeof(*__x) *`. With a defconfig + LTO + debug options build, we see the following functions to be affected: xen_manage_runstate_time (884 -> 944 bytes) xen_steal_clock (248 -> 340 bytes) ^-- use __READ_ONCE() to load vcpu_runstate_info structs Fixes: e35123d83ee3 ("arm64: lto: Strengthen READ_ONCE() to acquire when CONFIG_LTO=y") Cc: stable@vger.kernel.org Reviewed-by: Boqun Feng Signed-off-by: Marco Elver Tested-by: David Laight Signed-off-by: Will Deacon --- arch/arm64/include/asm/rwonce.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/include/asm/rwonce.h b/arch/arm64/include/asm/rwonce.h index 78beceec10cda..fc0fb42b0b641 100644 --- a/arch/arm64/include/asm/rwonce.h +++ b/arch/arm64/include/asm/rwonce.h @@ -58,7 +58,7 @@ default: \ atomic = 0; \ } \ - atomic ? (typeof(*__x))__u.__val : (*(volatile typeof(__x))__x);\ + atomic ? (typeof(*__x))__u.__val : (*(volatile typeof(*__x) *)__x);\ }) #endif /* !BUILD_VDSO */ -- 2.51.0