From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0CBC776026; Sun, 1 Mar 2026 01:52:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772329923; cv=none; b=E0j6WqNJnTVVDQ8F3CZniBBJwk83qLUZq3ot5qnSH9Vb2B5D6qAfzyD7g0zW4USrKh3c18Y2b5ZNvS6nwW8SdRZ7LT+/YuH+UH+L5jlOuirB9aJSgO8TshMocsOkOXxGpf5cJjwQWyPMB50kaULnCwKnI6eABIhrh/AQrN1U3ko= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772329923; c=relaxed/simple; bh=Az8LLLGv7p4NyyEga/O67fntIWNIPrpfEX+5iLQtwew=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=jj1qQ5FLhuT+E5BZlZkQhUTUdqynwKMKYt5jKk83QMktEfo0YeEiggY0OEDhTaCItbf5jNpueDPwwQUKyUOzfbR/b2TJOCcdrAZ0JwRBEbunvyGlziUyhFRZlGjd7rOqC0/oAUN7B95NI0Y4vEZwdBsvo2Lpzxw61Po2UnzJk/I= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=CPoyxD5s; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="CPoyxD5s" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3DC5AC19421; Sun, 1 Mar 2026 01:52:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1772329922; bh=Az8LLLGv7p4NyyEga/O67fntIWNIPrpfEX+5iLQtwew=; h=From:To:Cc:Subject:Date:From; b=CPoyxD5siAnETgnWjuZm77kAXJ7I9IoKjEHvDcKG+bk/+D02BG+rQoFSKWzRzJdbF RPX4NItLpr1RznSSR7xRlUubxvhUD1nz2iHmVmVzo8H7ueIePCmY0SIeje/ZZXO9XO P1MLZcWrxU6cFAsu047UUbbZFtWgWqcD4BOMO0sBLhhrnGwJh303qceLA4t6/e0BuB HepwqZ9+wllQnkTfi+RFceAAtonNkJ8F0eNP5TAnmTTjojpqcgVfoO0M4jEcKjYBrv d4CI8sYS1KLivOe5qrI7ubxv//lLADkLE+EbquBBzM1M/WaT0b98jBP3jTb2nrEi3D i7+ng2Ks40Hdw== From: Sasha Levin To: stable@vger.kernel.org, raag.jadav@intel.com Cc: Guido Trentalancia , Mika Westerberg , Andy Shevchenko , linux-gpio@vger.kernel.org Subject: FAILED: Patch "pinctrl: intel: Add code name documentation" failed to apply to 5.15-stable tree Date: Sat, 28 Feb 2026 20:52:00 -0500 Message-ID: <20260301015201.1718433-1-sashal@kernel.org> X-Mailer: git-send-email 2.51.0 Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Hint: ignore X-stable: review Content-Transfer-Encoding: 8bit The patch below does not apply to the 5.15-stable tree. If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to . Thanks, Sasha ------------------ original commit in Linus's tree ------------------ >From fc32c5725fbe1164d353400389d3e29d19960a3a Mon Sep 17 00:00:00 2001 From: Raag Jadav Date: Sat, 24 Jan 2026 13:44:54 +0530 Subject: [PATCH] pinctrl: intel: Add code name documentation Intel pinctrl drivers support large set of platforms and the IPs are often reused by their different variants, but it's currently not possible to figure out the exact driver that supports specific variant. Add user friendly documentation for them. Cc: stable@vger.kernel.org Reported-by: Guido Trentalancia Closes: https://bugzilla.kernel.org/show_bug.cgi?id=220056 Signed-off-by: Raag Jadav Acked-by: Mika Westerberg Acked-by: Guido Trentalancia [andy: added Oxford comma] Signed-off-by: Andy Shevchenko --- drivers/pinctrl/intel/Kconfig | 21 +++++++++++++++------ 1 file changed, 15 insertions(+), 6 deletions(-) diff --git a/drivers/pinctrl/intel/Kconfig b/drivers/pinctrl/intel/Kconfig index e4dc9ba899bde..04c3a5b581f3c 100644 --- a/drivers/pinctrl/intel/Kconfig +++ b/drivers/pinctrl/intel/Kconfig @@ -53,7 +53,10 @@ config PINCTRL_ALDERLAKE select PINCTRL_INTEL help This pinctrl driver provides an interface that allows configuring - of Intel Alder Lake PCH pins and using them as GPIOs. + PCH pins of the following platforms and using them as GPIOs: + - Alder Lake HX, N, and S + - Raptor Lake HX, E, and S + - Twin Lake config PINCTRL_BROXTON tristate "Intel Broxton pinctrl and GPIO driver" @@ -137,15 +140,17 @@ config PINCTRL_METEORLAKE select PINCTRL_INTEL help This pinctrl driver provides an interface that allows configuring - of Intel Meteor Lake pins and using them as GPIOs. + SoC pins of the following platforms and using them as GPIOs: + - Arrow Lake (all variants) + - Meteor Lake (all variants) config PINCTRL_METEORPOINT tristate "Intel Meteor Point pinctrl and GPIO driver" select PINCTRL_INTEL help - Meteor Point is the PCH of Intel Meteor Lake. This pinctrl driver - provides an interface that allows configuring of PCH pins and - using them as GPIOs. + This pinctrl driver provides an interface that allows configuring + PCH pins of the following platforms and using them as GPIOs: + - Arrow Lake HX and S config PINCTRL_SUNRISEPOINT tristate "Intel Sunrisepoint pinctrl and GPIO driver" @@ -160,7 +165,11 @@ config PINCTRL_TIGERLAKE select PINCTRL_INTEL help This pinctrl driver provides an interface that allows configuring - of Intel Tiger Lake PCH pins and using them as GPIOs. + PCH pins of the following platforms and using them as GPIOs: + - Alder Lake H, P, PS, and U + - Raptor Lake H, P, PS, PX, and U + - Rocket Lake S + - Tiger Lake (all variants) source "drivers/pinctrl/intel/Kconfig.tng" endmenu -- 2.51.0