From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5A1AD292936 for ; Mon, 16 Mar 2026 18:34:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773686070; cv=none; b=QnlznpszI6c2Jao5Lb/bT1hnapr+iXun3BxFm1ePnzrFK0B+q8vqlzHMKOUMXLAlCu8iw1AWYqFvQCXQ/TXEQgI9fW4xKKO5s9Om5LvYGJvDhQNgMqB/5wM6IF17Cv5oztTiFivPF+UK3oD4CHd6rxsiAFt0R2sieDZP+rekw54= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773686070; c=relaxed/simple; bh=yfC99boTQVO2Gfeo45Fgh1YWtr5s1tGjp6ei0Yweoq0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=h3MMuZQstTt9hj2GOeqBo7qz0hONjo/qdQnN11yncHJUX3loJcbee/Fq/4wB320RKmTBh5TqpiulUiSLKy0wienkJx2JyqH4U/8yNVfIspWVSxQkQb5VBqAjof4BhGmHM+vUwfexyeBkzcV5ZYPm1Y1Xvo5BtffUZlK9h5slYOQ= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=N9vjU9qr; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="N9vjU9qr" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5489AC19421; Mon, 16 Mar 2026 18:34:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1773686070; bh=yfC99boTQVO2Gfeo45Fgh1YWtr5s1tGjp6ei0Yweoq0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=N9vjU9qrtlmtTCDjemgK5CLGi0hj6c5D9PmeODdcbdHD39hJHBZEBcIPnQ95QM1f4 Es+WxDeLlX7zfvCckMZf2PoHqTahm+9DkogSpuBY/b5RynbrfU0C1Fl+12G9WAI0Ej aFjWRkf0X4CmUixqMPZwIbt0hrx2eDKZCwndI6SliZbkCnRb/5wEOfUBfIysFSyfz3 lnXyMOSd1K7s0rxbwc9VkczQo8/lCgF2h8tBO+ef81kr1p7CJqCaaAecwRUSw6lb/Z Ni9t/zfuT8gKmFmFLO4hmg7sBF13gztni9RM4c+wDTfIjKfk0/Er6RE83Wt+Q4u4yQ Ds+COZlvWD4UA== From: Sasha Levin To: stable@vger.kernel.org Cc: Sean Christopherson , "Naveen N Rao (AMD)" , Jim Mattson , Paolo Bonzini , Sasha Levin Subject: [PATCH 5.15.y] KVM: SVM: Initialize AVIC VMCB fields if AVIC is enabled with in-kernel APIC Date: Mon, 16 Mar 2026 14:34:27 -0400 Message-ID: <20260316183427.1074945-1-sashal@kernel.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <2026031620-pediatric-distant-133b@gregkh> References: <2026031620-pediatric-distant-133b@gregkh> Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Sean Christopherson [ Upstream commit 3989a6d036c8ec82c0de3614bed23a1dacd45de5 ] Initialize all per-vCPU AVIC control fields in the VMCB if AVIC is enabled in KVM and the VM has an in-kernel local APIC, i.e. if it's _possible_ the vCPU could activate AVIC at any point in its lifecycle. Configuring the VMCB if and only if AVIC is active "works" purely because of optimizations in kvm_create_lapic() to speculatively set apicv_active if AVIC is enabled *and* to defer updates until the first KVM_RUN. In quotes because KVM likely won't do the right thing if kvm_apicv_activated() is false, i.e. if a vCPU is created while APICv is inhibited at the VM level for whatever reason. E.g. if the inhibit is *removed* before KVM_REQ_APICV_UPDATE is handled in KVM_RUN, then __kvm_vcpu_update_apicv() will elide calls to vendor code due to seeing "apicv_active == activate". Cleaning up the initialization code will also allow fixing a bug where KVM incorrectly leaves CR8 interception enabled when AVIC is activated without creating a mess with respect to whether AVIC is activated or not. Cc: stable@vger.kernel.org Fixes: 67034bb9dd5e ("KVM: SVM: Add irqchip_split() checks before enabling AVIC") Fixes: 6c3e4422dd20 ("svm: Add support for dynamic APICv") Reviewed-by: Naveen N Rao (AMD) Reviewed-by: Jim Mattson Link: https://patch.msgid.link/20260203190711.458413-2-seanjc@google.com Signed-off-by: Sean Christopherson Signed-off-by: Paolo Bonzini [ context ] Signed-off-by: Sasha Levin --- arch/x86/kvm/svm/avic.c | 2 +- arch/x86/kvm/svm/svm.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c index 4bb2fbe6676a1..7ed416dcb89c6 100644 --- a/arch/x86/kvm/svm/avic.c +++ b/arch/x86/kvm/svm/avic.c @@ -199,7 +199,7 @@ void avic_init_vmcb(struct vcpu_svm *svm) vmcb->control.avic_physical_id |= AVIC_MAX_PHYSICAL_ID_COUNT; vmcb->control.avic_vapic_bar = APIC_DEFAULT_PHYS_BASE & VMCB_AVIC_APIC_BAR_MASK; - if (kvm_apicv_activated(svm->vcpu.kvm)) + if (kvm_vcpu_apicv_active(&svm->vcpu)) vmcb->control.int_ctl |= AVIC_ENABLE_MASK; else vmcb->control.int_ctl &= ~AVIC_ENABLE_MASK; diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c index 1687b74a1a4d8..02346fcce5d8a 100644 --- a/arch/x86/kvm/svm/svm.c +++ b/arch/x86/kvm/svm/svm.c @@ -1299,7 +1299,7 @@ static void init_vmcb(struct kvm_vcpu *vcpu) if (boot_cpu_has(X86_FEATURE_V_SPEC_CTRL)) set_msr_interception(vcpu, svm->msrpm, MSR_IA32_SPEC_CTRL, 1, 1); - if (kvm_vcpu_apicv_active(vcpu)) + if (enable_apicv && irqchip_in_kernel(vcpu->kvm)) avic_init_vmcb(svm); if (vgif) { -- 2.51.0