From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 37AEF2C0F78 for ; Mon, 16 Mar 2026 20:18:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773692284; cv=none; b=BFyU7dusihD43dfgGcQF5Gdfr3wHovHbn74TknkdKf3mqSrczGqAewbhyCtUScqNjfqLyZAjlwjUykyXrC9qZYYgAf0rQ+tuD2LHN7j5wzGWuRYyXi13cNctJBdTiIxrBu2p5bEPf2imXV+hgF+rFtHhRa80k38MamRB0tu4w9Y= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773692284; c=relaxed/simple; bh=Xgw0bWhldJJQL74Ufbt8AJWFi3/wKvBtlFJbfcTRsmM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=FjbBKHeTef876y8rAbcpR6q4KDTQACzkJ8K02twTPb1LQS9GgHRVHwED4/7RApi7WceEhwFbJQ/51TTj1VSSsIsoox21u0462LXFmS5G6XblDBMDZY3BN69zdILukuf0aMw5wv0dWalj7NeFUKE91rKhrkTpE8iBiX9dpJMwXFQ= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=DSFDdZIp; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="DSFDdZIp" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 1C673C19421; Mon, 16 Mar 2026 20:18:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1773692283; bh=Xgw0bWhldJJQL74Ufbt8AJWFi3/wKvBtlFJbfcTRsmM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=DSFDdZIpbcDIGQhdZK61jmNFx8QE3wTFyim+/DKMyHM2eKmD5MOoLHWbEI5/WSPud K+4JhG07wECdUnlTbQnwKneB5D35JW5rr932b0B8BhEWaJccR2Eh17yVCk++c0ggK/ RdnkRm+SWDzyxiEX26lusqcbZJgJcjMYREfYdtEhHlXxohsZW6v9exlFp2d5hcn2+4 XJNQ6muWgmVOhYM2Ak5cxBYPczSvxjrEX1S7Ki/dkkgeBhenjwzXynRclmVY9u9lj1 tQGtHk+iSMqbPC/ZGR5R1gUqXbqHf9GSTKOT78Gz/mJF/RdvXfkuYjmfHnjXOt4TAl 96LbB3J8T0IXw== From: Sasha Levin To: stable@vger.kernel.org Cc: Sean Christopherson , Jim Mattson , "Naveen N Rao (AMD)" , "Maciej S. Szmigiero" , Paolo Bonzini , Sasha Levin Subject: [PATCH 6.1.y] KVM: SVM: Set/clear CR8 write interception when AVIC is (de)activated Date: Mon, 16 Mar 2026 16:18:01 -0400 Message-ID: <20260316201801.1376275-1-sashal@kernel.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <2026031634-departed-sandlot-6482@gregkh> References: <2026031634-departed-sandlot-6482@gregkh> Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Sean Christopherson [ Upstream commit 87d0f901a9bd8ae6be57249c737f20ac0cace93d ] Explicitly set/clear CR8 write interception when AVIC is (de)activated to fix a bug where KVM leaves the interception enabled after AVIC is activated. E.g. if KVM emulates INIT=>WFS while AVIC is deactivated, CR8 will remain intercepted in perpetuity. On its own, the dangling CR8 intercept is "just" a performance issue, but combined with the TPR sync bug fixed by commit d02e48830e3f ("KVM: SVM: Sync TPR from LAPIC into VMCB::V_TPR even if AVIC is active"), the danging intercept is fatal to Windows guests as the TPR seen by hardware gets wildly out of sync with reality. Note, VMX isn't affected by the bug as TPR_THRESHOLD is explicitly ignored when Virtual Interrupt Delivery is enabled, i.e. when APICv is active in KVM's world. I.e. there's no need to trigger update_cr8_intercept(), this is firmly an SVM implementation flaw/detail. WARN if KVM gets a CR8 write #VMEXIT while AVIC is active, as KVM should never enter the guest with AVIC enabled and CR8 writes intercepted. Fixes: 3bbf3565f48c ("svm: Do not intercept CR8 when enable AVIC") Cc: stable@vger.kernel.org Cc: Jim Mattson Cc: Naveen N Rao (AMD) Cc: Maciej S. Szmigiero Reviewed-by: Naveen N Rao (AMD) Reviewed-by: Jim Mattson Link: https://patch.msgid.link/20260203190711.458413-3-seanjc@google.com Signed-off-by: Sean Christopherson [Squash fix to avic_deactivate_vmcb. - Paolo] Signed-off-by: Paolo Bonzini [ adjusted context ] Signed-off-by: Sasha Levin --- arch/x86/kvm/svm/avic.c | 6 +++++- arch/x86/kvm/svm/svm.c | 7 ++++--- 2 files changed, 9 insertions(+), 4 deletions(-) diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c index 0adbf0677b7c4..e6abfec5e7b29 100644 --- a/arch/x86/kvm/svm/avic.c +++ b/arch/x86/kvm/svm/avic.c @@ -79,9 +79,10 @@ static void avic_activate_vmcb(struct vcpu_svm *svm) vmcb->control.int_ctl &= ~(AVIC_ENABLE_MASK | X2APIC_MODE_MASK); vmcb->control.avic_physical_id &= ~AVIC_PHYSICAL_MAX_INDEX_MASK; - vmcb->control.int_ctl |= AVIC_ENABLE_MASK; + svm_clr_intercept(svm, INTERCEPT_CR8_WRITE); + /* Note: * KVM can support hybrid-AVIC mode, where KVM emulates x2APIC * MSR accesses, while interrupt injection to a running vCPU @@ -116,6 +117,9 @@ static void avic_deactivate_vmcb(struct vcpu_svm *svm) vmcb->control.int_ctl &= ~(AVIC_ENABLE_MASK | X2APIC_MODE_MASK); vmcb->control.avic_physical_id &= ~AVIC_PHYSICAL_MAX_INDEX_MASK; + if (!sev_es_guest(svm->vcpu.kvm)) + svm_set_intercept(svm, INTERCEPT_CR8_WRITE); + /* * If running nested and the guest uses its own MSR bitmap, there * is no need to update L0's msr bitmap diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c index a885fb39a6559..6e3c27cc7b7fc 100644 --- a/arch/x86/kvm/svm/svm.c +++ b/arch/x86/kvm/svm/svm.c @@ -1192,8 +1192,7 @@ static void init_vmcb(struct kvm_vcpu *vcpu) svm_set_intercept(svm, INTERCEPT_CR0_WRITE); svm_set_intercept(svm, INTERCEPT_CR3_WRITE); svm_set_intercept(svm, INTERCEPT_CR4_WRITE); - if (!kvm_vcpu_apicv_active(vcpu)) - svm_set_intercept(svm, INTERCEPT_CR8_WRITE); + svm_set_intercept(svm, INTERCEPT_CR8_WRITE); set_dr_intercepts(svm); @@ -2690,9 +2689,11 @@ static int dr_interception(struct kvm_vcpu *vcpu) static int cr8_write_interception(struct kvm_vcpu *vcpu) { + u8 cr8_prev = kvm_get_cr8(vcpu); int r; - u8 cr8_prev = kvm_get_cr8(vcpu); + WARN_ON_ONCE(kvm_vcpu_apicv_active(vcpu)); + /* instruction emulation calls kvm_set_cr8() */ r = cr_interception(vcpu); if (lapic_in_kernel(vcpu)) -- 2.51.0