From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from desiato.infradead.org (desiato.infradead.org [90.155.92.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 22E8C22578D; Wed, 18 Mar 2026 20:47:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=90.155.92.199 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773866850; cv=none; b=LCCMXYmNlt6bcHd5123UYxqap7bhyXt/jU8eubyeC6SNcm502UzVD+d7JwxNrHwtxLpJgM+WGP4vUUmEzKK5S7ccZ0WerDoPuPBQAvQmSw048+LT1oFmT9/drb/Tg58tSZwqi0/UD/Jw/7W+Y84KzI2ktAfEVlYJMutTfQaFleM= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773866850; c=relaxed/simple; bh=yETwrF33W3Kw0DDcr7FfcsFsCMX7+ZNqRz7F/giZ35w=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=g7TrEfSJbx58vipSBZxm/MuwYaNdwJLV4fABWCP/thQHrx2Txsi+hL+1+lhH7vo2vFpX72Cwz7YMYf62hZlPJI2grPnAT1L0dXH3qN78wJu+shYNPStbrxIpnYdcod7ArGpWRqjcBSy+ia64ZFPZfr8aDK4A4nNZ90A2BBW1ux0= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=infradead.org; spf=none smtp.mailfrom=infradead.org; dkim=pass (2048-bit key) header.d=infradead.org header.i=@infradead.org header.b=GrIoF4wb; arc=none smtp.client-ip=90.155.92.199 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=infradead.org Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=infradead.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=infradead.org header.i=@infradead.org header.b="GrIoF4wb" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=In-Reply-To:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=C7+DsZQTrjc+Xia09ov6XqWDjTJ1+oxsmqkxhayk73I=; b=GrIoF4wb8/rFbZSJEG6MMCtKuY /9v+ecOQW6COV42nIqzA9MjId5BiBg6DjC8nK4gSNwZvgyrV+AMlGspJ9Seu2Xp+CHVyW1Op5Pn9+ VKEC4d8cj+J6Kpic1curd5Y9FzBmTrbT9Uhs4Ta2FpY2LGbvhtKTPQS+KT72UreRlKIJOtpLefc5e uxfO3cNDH9A7HCIFvlHLfeeHpyHXNsgPu2rOCkjD0xkpgY9Gm5byYX/yfYQ5t5bM42gRFnUvp+NTj wh1R+1nr8V+2wgDIjMtI3IZU5LvvPNecx5ICfrKrUdt7vlYuPye6Xl02xaKTa5oSLW4Cg0bXb14u1 KDLKLQ7A==; Received: from 2001-1c00-8d85-5700-266e-96ff-fe07-7dcc.cable.dynamic.v6.ziggo.nl ([2001:1c00:8d85:5700:266e:96ff:fe07:7dcc] helo=noisy.programming.kicks-ass.net) by desiato.infradead.org with esmtpsa (Exim 4.98.2 #2 (Red Hat Linux)) id 1w2xnX-0000000CF3T-0NYT; Wed, 18 Mar 2026 20:47:23 +0000 Received: by noisy.programming.kicks-ass.net (Postfix, from userid 1000) id 532743004F8; Wed, 18 Mar 2026 21:47:22 +0100 (CET) Date: Wed, 18 Mar 2026 21:47:22 +0100 From: Peter Zijlstra To: linux-kernel@vger.kernel.org Cc: linux-tip-commits@vger.kernel.org, Nikunj A Dadhania , Dave Hansen , "Borislav Petkov (AMD)" , Sohil Mehta , stable@vger.kernel.org, #@tip-bot2.tec.linutronix.de, 6.9+@tip-bot2.tec.linutronix.de, x86@kernel.org Subject: Re: [tip: x86/urgent] x86/cpu: Disable CR pinning during CPU bringup Message-ID: <20260318204722.GD3738786@noisy.programming.kicks-ass.net> References: <20260318075654.1792916-3-nikunj@amd.com> <177385987098.1647592.3381141860481415647.tip-bot2@tip-bot2> Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <177385987098.1647592.3381141860481415647.tip-bot2@tip-bot2> On Wed, Mar 18, 2026 at 06:51:10PM -0000, tip-bot2 for Dave Hansen wrote: > --- a/arch/x86/kernel/cpu/common.c > +++ b/arch/x86/kernel/cpu/common.c > @@ -437,6 +437,21 @@ static const unsigned long cr4_pinned_mask = X86_CR4_SMEP | X86_CR4_SMAP | X86_C > static DEFINE_STATIC_KEY_FALSE_RO(cr_pinning); > static unsigned long cr4_pinned_bits __ro_after_init; > > +static bool cr_pinning_enabled(void) > +{ > + if (!static_branch_likely(&cr_pinning)) > + return false; > + > + /* > + * Do not enforce pinning during CPU bringup. It might > + * turn on features that are not set up yet, like FRED. > + */ > + if (!cpu_online(smp_processor_id())) > + return false; > + > + return true; > +} Urgh, so this means all an attack needs to do is disable the online bit and it gets to poke CR4 bits. This seems unfortunate. And sure, randomly clearing the online bit will eventually cause havoc, but I suspect you still get plenty time until the system goes wobbly.