From: Greg KH <gregkh@linuxfoundation.org>
To: "Jouni Högander" <jouni.hogander@intel.com>
Cc: stable@vger.kernel.org,
Ankit Nautiyal <ankit.k.nautiyal@intel.com>,
Tvrtko Ursulin <tursulin@ursulin.net>
Subject: Re: [PATCH 6.18.y 1/3] drm/i915/dsc: Add Selective Update register definitions
Date: Thu, 19 Mar 2026 11:40:00 +0100 [thread overview]
Message-ID: <2026031943-outcome-cupcake-bdbe@gregkh> (raw)
In-Reply-To: <20260318132412.1117060-1-jouni.hogander@intel.com>
On Wed, Mar 18, 2026 at 03:24:10PM +0200, Jouni Högander wrote:
> commit c2c79c6d5b939ae8a42ddb884f576bddae685672 upstream.
>
> Add definitions for DSC_SU_PARAMETER_SET_0_DSC0 and
> DSC_SU_PARAMETER_SET_0_DSC1 registers. These are for Selective Update Early
> Transport configuration.
>
> Bspec: 71709
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> Link: https://patch.msgid.link/20260304113011.626542-3-jouni.hogander@intel.com
> (cherry picked from commit 24f96d903daf3dcf8fafe84d3d22b80ef47ba493)
> Signed-off-by: Tvrtko Ursulin <tursulin@ursulin.net>
> (cherry picked from commit c2c79c6d5b939ae8a42ddb884f576bddae685672)
> ---
> drivers/gpu/drm/i915/display/intel_vdsc_regs.h | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
We need a 6.19.y version of this before we can take older versions :(
prev parent reply other threads:[~2026-03-19 10:40 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-17 13:23 FAILED: patch "[PATCH] drm/i915/psr: Write DSC parameters on Selective Update in ET" failed to apply to 6.18-stable tree gregkh
2026-03-18 13:24 ` [PATCH 6.18.y 1/3] drm/i915/dsc: Add Selective Update register definitions Jouni Högander
2026-03-18 13:24 ` [PATCH 6.18.y 2/3] drm/i915/dsc: Add helper for writing DSC Selective Update ET parameters Jouni Högander
2026-03-18 13:24 ` [PATCH 6.18.y 3/3] drm/i915/psr: Write DSC parameters on Selective Update in ET mode Jouni Högander
2026-03-19 10:40 ` Greg KH [this message]
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