From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9197323BCFD; Mon, 23 Mar 2026 14:03:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774274639; cv=none; b=RC+HBl1CPUWF710ngvfKcvXBqMTzAYzMTTctjmCssh0nutrHC7/ClJj59E9QsE9o3KPNwnNtozRvlRWJmyk5w/cS1WnHWmJ/YzLvT4rWrgZupFSTbMj2ZIh1ILNZ+3ytaHVQqRLpAI4FS0yWqqZWrLQh/aBguEekjX/k7062xR0= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774274639; c=relaxed/simple; bh=Fmv28O1m2maarhqPXvPgEGDY/cUXhAIcFYrc+tp9Tk4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ISEqsU+mCO2EYIPMk9lrME4K85cip//9t7mceVb6yshd89kNveAMt5V2RoLBKXJkiLT8ztfKGcJtwZdPnHrq5tXcL9jALe4cniET3OiMnvNgIRqrYjUT9MAe2pVwFlYRL5t4jO6l4RkMRBHKID+e282ZoNNumKgXqO4lS5fm6Cg= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=YfyoyByp; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="YfyoyByp" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 11ACCC4CEF7; Mon, 23 Mar 2026 14:03:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1774274639; bh=Fmv28O1m2maarhqPXvPgEGDY/cUXhAIcFYrc+tp9Tk4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=YfyoyBypokZ7XljXSBHaia/IRCafx2DYNSujy57kYRLn1iR2bnrJZPgxqh51b4bPj 78P4n3jt1jOsqs5tEbo/wzaBUHGq6hnihwdvoptPA/zZkn971RK8eOvfw2r0kqXrY1 6Ckr8gTOz8Jy2cZr3rbcAQaB5C5/2OxNf+FPdRBQ= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Guanghui Feng , Shuai Xue , Samiullah Khawaja , Lu Baolu , Joerg Roedel Subject: [PATCH 6.18 061/212] iommu/vt-d: Fix intel iommu iotlb sync hardlockup and retry Date: Mon, 23 Mar 2026 14:44:42 +0100 Message-ID: <20260323134505.704657541@linuxfoundation.org> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260323134503.770111826@linuxfoundation.org> References: <20260323134503.770111826@linuxfoundation.org> User-Agent: quilt/0.69 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 6.18-stable review patch. If anyone has any objections, please let me know. ------------------ From: Guanghui Feng commit fe89277c9ceb0d6af0aa665bcf24a41d8b1b79cd upstream. During the qi_check_fault process after an IOMMU ITE event, requests at odd-numbered positions in the queue are set to QI_ABORT, only satisfying single-request submissions. However, qi_submit_sync now supports multiple simultaneous submissions, and can't guarantee that the wait_desc will be at an odd-numbered position. Therefore, if an item times out, IOMMU can't re-initiate the request, resulting in an infinite polling wait. This modifies the process by setting the status of all requests already fetched by IOMMU and recorded as QI_IN_USE status (including wait_desc requests) to QI_ABORT, thus enabling multiple requests to be resubmitted. Fixes: 8a1d82462540 ("iommu/vt-d: Multiple descriptors per qi_submit_sync()") Cc: stable@vger.kernel.org Signed-off-by: Guanghui Feng Tested-by: Shuai Xue Reviewed-by: Shuai Xue Reviewed-by: Samiullah Khawaja Link: https://lore.kernel.org/r/20260306101516.3885775-1-guanghuifeng@linux.alibaba.com Signed-off-by: Lu Baolu Fixes: 8a1d82462540 ("iommu/vt-d: Multiple descriptors per qi_submit_sync()") Signed-off-by: Joerg Roedel Signed-off-by: Greg Kroah-Hartman --- drivers/iommu/intel/dmar.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) --- a/drivers/iommu/intel/dmar.c +++ b/drivers/iommu/intel/dmar.c @@ -1314,7 +1314,6 @@ static int qi_check_fault(struct intel_i if (fault & DMA_FSTS_ITE) { head = readl(iommu->reg + DMAR_IQH_REG); head = ((head >> shift) - 1 + QI_LENGTH) % QI_LENGTH; - head |= 1; tail = readl(iommu->reg + DMAR_IQT_REG); tail = ((tail >> shift) - 1 + QI_LENGTH) % QI_LENGTH; @@ -1331,7 +1330,7 @@ static int qi_check_fault(struct intel_i do { if (qi->desc_status[head] == QI_IN_USE) qi->desc_status[head] = QI_ABORT; - head = (head - 2 + QI_LENGTH) % QI_LENGTH; + head = (head - 1 + QI_LENGTH) % QI_LENGTH; } while (head != tail); /*