* [PATCH 1/6] drm/i915/cdclk: Do the full CDCLK dance for min_voltage_level changes
[not found] <20260325135849.12603-1-ville.syrjala@linux.intel.com>
@ 2026-03-25 13:58 ` Ville Syrjala
2026-03-25 15:40 ` Michał Grzelak
2026-03-25 13:58 ` [PATCH 2/6] drm/i915/dp: Use crtc_state->enhanced_framing properly on ivb/hsw CPU eDP Ville Syrjala
1 sibling, 1 reply; 4+ messages in thread
From: Ville Syrjala @ 2026-03-25 13:58 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe, stable, Mikhail Rudenko
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Apparently I forgot about the pipe min_voltage_level when I
decoupled the CDCLK calculations from modesets. Even if the
CDCLK frequency doesn't need changing we may still need to
bump the voltage level to accommodate an increase in the
port clock frequency.
Currently, even if there is a full modeset, we won't notice the
need to go through the full CDCLK calculations/programming,
unless the set of enabled/active pipes changes, or the
pipe/dbuf min CDCLK changes.
Duplicate the same logic we use the pipe's min CDCLK frequency
to also deal with its min voltage level.
Note that the 'allow_voltage_level_decrease' stuff isn't
really useful here since the min voltage level can only
change during a full modeset. But I think sticking to the
same approach in the three similar parts (pipe min cdclk,
pipe min voltage level, dbuf min cdclk) is a good idea.
Cc: stable@vger.kernel.org
Tested-by: Mikhail Rudenko <mike.rudenko@gmail.com>
Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15826
Fixes: ba91b9eecb47 ("drm/i915/cdclk: Decouple cdclk from state->modeset")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 54 ++++++++++++++++++++++
1 file changed, 54 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 121a12c5b8ac..a47736613f6e 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -2972,6 +2972,53 @@ static int intel_cdclk_update_crtc_min_cdclk(struct intel_atomic_state *state,
return 0;
}
+static int intel_cdclk_update_crtc_min_voltage_level(struct intel_atomic_state *state,
+ struct intel_crtc *crtc,
+ u8 old_min_voltage_level,
+ u8 new_min_voltage_level,
+ bool *need_cdclk_calc)
+{
+ struct intel_display *display = to_intel_display(state);
+ struct intel_cdclk_state *cdclk_state;
+ bool allow_voltage_level_decrease = intel_any_crtc_needs_modeset(state);
+ int ret;
+
+ if (new_min_voltage_level == old_min_voltage_level)
+ return 0;
+
+ if (!allow_voltage_level_decrease &&
+ new_min_voltage_level < old_min_voltage_level)
+ return 0;
+
+ cdclk_state = intel_atomic_get_cdclk_state(state);
+ if (IS_ERR(cdclk_state))
+ return PTR_ERR(cdclk_state);
+
+ old_min_voltage_level = cdclk_state->min_voltage_level[crtc->pipe];
+
+ if (new_min_voltage_level == old_min_voltage_level)
+ return 0;
+
+ if (!allow_voltage_level_decrease &&
+ new_min_voltage_level < old_min_voltage_level)
+ return 0;
+
+ cdclk_state->min_voltage_level[crtc->pipe] = new_min_voltage_level;
+
+ ret = intel_atomic_lock_global_state(&cdclk_state->base);
+ if (ret)
+ return ret;
+
+ *need_cdclk_calc = true;
+
+ drm_dbg_kms(display->drm,
+ "[CRTC:%d:%s] min voltage level: %d -> %d\n",
+ crtc->base.base.id, crtc->base.name,
+ old_min_voltage_level, new_min_voltage_level);
+
+ return 0;
+}
+
int intel_cdclk_update_dbuf_bw_min_cdclk(struct intel_atomic_state *state,
int old_min_cdclk, int new_min_cdclk,
bool *need_cdclk_calc)
@@ -3387,6 +3434,13 @@ static int intel_crtcs_calc_min_cdclk(struct intel_atomic_state *state,
need_cdclk_calc);
if (ret)
return ret;
+
+ ret = intel_cdclk_update_crtc_min_voltage_level(state, crtc,
+ old_crtc_state->min_voltage_level,
+ new_crtc_state->min_voltage_level,
+ need_cdclk_calc);
+ if (ret)
+ return ret;
}
return 0;
--
2.52.0
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 2/6] drm/i915/dp: Use crtc_state->enhanced_framing properly on ivb/hsw CPU eDP
[not found] <20260325135849.12603-1-ville.syrjala@linux.intel.com>
2026-03-25 13:58 ` [PATCH 1/6] drm/i915/cdclk: Do the full CDCLK dance for min_voltage_level changes Ville Syrjala
@ 2026-03-25 13:58 ` Ville Syrjala
2026-03-25 15:44 ` Michał Grzelak
1 sibling, 1 reply; 4+ messages in thread
From: Ville Syrjala @ 2026-03-25 13:58 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe, stable
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Looks like I missed the drm_dp_enhanced_frame_cap() in the ivb/hsw CPU
eDP code when I introduced crtc_state->enhanced_framing. Fix it up so
that the state we program to the hardware is guaranteed to match what
we computed earlier.
Cc: stable@vger.kernel.org
Fixes: 3072a24c778a ("drm/i915: Introduce crtc_state->enhanced_framing")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/g4x_dp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c b/drivers/gpu/drm/i915/display/g4x_dp.c
index d7de329abf19..5e74d8a3ba5c 100644
--- a/drivers/gpu/drm/i915/display/g4x_dp.c
+++ b/drivers/gpu/drm/i915/display/g4x_dp.c
@@ -136,7 +136,7 @@ static void intel_dp_prepare(struct intel_encoder *encoder,
intel_dp->DP |= DP_SYNC_VS_HIGH;
intel_dp->DP |= DP_LINK_TRAIN_OFF_CPT;
- if (drm_dp_enhanced_frame_cap(intel_dp->dpcd))
+ if (pipe_config->enhanced_framing)
intel_dp->DP |= DP_ENHANCED_FRAMING;
intel_dp->DP |= DP_PIPE_SEL_IVB(crtc->pipe);
--
2.52.0
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH 1/6] drm/i915/cdclk: Do the full CDCLK dance for min_voltage_level changes
2026-03-25 13:58 ` [PATCH 1/6] drm/i915/cdclk: Do the full CDCLK dance for min_voltage_level changes Ville Syrjala
@ 2026-03-25 15:40 ` Michał Grzelak
0 siblings, 0 replies; 4+ messages in thread
From: Michał Grzelak @ 2026-03-25 15:40 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx, intel-xe, stable, Mikhail Rudenko
[-- Attachment #1: Type: text/plain, Size: 1355 bytes --]
On Wed, 25 Mar 2026, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Apparently I forgot about the pipe min_voltage_level when I
> decoupled the CDCLK calculations from modesets. Even if the
> CDCLK frequency doesn't need changing we may still need to
> bump the voltage level to accommodate an increase in the
> port clock frequency.
>
> Currently, even if there is a full modeset, we won't notice the
> need to go through the full CDCLK calculations/programming,
> unless the set of enabled/active pipes changes, or the
> pipe/dbuf min CDCLK changes.
>
> Duplicate the same logic we use the pipe's min CDCLK frequency
> to also deal with its min voltage level.
>
> Note that the 'allow_voltage_level_decrease' stuff isn't
> really useful here since the min voltage level can only
> change during a full modeset. But I think sticking to the
> same approach in the three similar parts (pipe min cdclk,
> pipe min voltage level, dbuf min cdclk) is a good idea.
>
> Cc: stable@vger.kernel.org
> Tested-by: Mikhail Rudenko <mike.rudenko@gmail.com>
> Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15826
> Fixes: ba91b9eecb47 ("drm/i915/cdclk: Decouple cdclk from state->modeset")
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Michał Grzelak <michal.grzelak@intel.com>
BR,
Michał
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH 2/6] drm/i915/dp: Use crtc_state->enhanced_framing properly on ivb/hsw CPU eDP
2026-03-25 13:58 ` [PATCH 2/6] drm/i915/dp: Use crtc_state->enhanced_framing properly on ivb/hsw CPU eDP Ville Syrjala
@ 2026-03-25 15:44 ` Michał Grzelak
0 siblings, 0 replies; 4+ messages in thread
From: Michał Grzelak @ 2026-03-25 15:44 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx, intel-xe, stable
[-- Attachment #1: Type: text/plain, Size: 574 bytes --]
On Wed, 25 Mar 2026, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Looks like I missed the drm_dp_enhanced_frame_cap() in the ivb/hsw CPU
> eDP code when I introduced crtc_state->enhanced_framing. Fix it up so
> that the state we program to the hardware is guaranteed to match what
> we computed earlier.
>
> Cc: stable@vger.kernel.org
> Fixes: 3072a24c778a ("drm/i915: Introduce crtc_state->enhanced_framing")
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Michał Grzelak <michal.grzelak@intel.com>
BR,
Michał
^ permalink raw reply [flat|nested] 4+ messages in thread
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[not found] <20260325135849.12603-1-ville.syrjala@linux.intel.com>
2026-03-25 13:58 ` [PATCH 1/6] drm/i915/cdclk: Do the full CDCLK dance for min_voltage_level changes Ville Syrjala
2026-03-25 15:40 ` Michał Grzelak
2026-03-25 13:58 ` [PATCH 2/6] drm/i915/dp: Use crtc_state->enhanced_framing properly on ivb/hsw CPU eDP Ville Syrjala
2026-03-25 15:44 ` Michał Grzelak
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