From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 827563D8917; Wed, 8 Apr 2026 18:11:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775671892; cv=none; b=aM0Doer3lXnS2aiO7UQclHjmEGjrBBqVGYTm218YyPkJ24fExlM1LDZv+ieONRuRNWt8r4krbUI39K6kWcbFcsm2X0MJtjagqP/qy3MUwAmUMhXfS5Yya9Z4ksfVwOagxTmdgFtQIPKTm53YBXCKEmXLucDPujGjA5u4v3MZgbA= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775671892; c=relaxed/simple; bh=v7Bmr2U1h//l8H8XBQNJLGDzG96utygwlOV7WzKBl5Q=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=E3xaDAegn+cvW9lZJxtInS7q3qpngBuGYzCif0trRSN54hMffcZ+AHbYK28kP+DdM3F83sZYAX+ZNkZKLabvXNxUs2f0aoPQMQ+ofbzEkzBoWCG5zIxLcndAJScWxpEal5RuG+XVIg3V5V0vNe3PAefIpazUT7JR5J99g0rN95c= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=fu1pdo50; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="fu1pdo50" Received: by smtp.kernel.org (Postfix) with ESMTPSA id CF579C19421; Wed, 8 Apr 2026 18:11:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1775671892; bh=v7Bmr2U1h//l8H8XBQNJLGDzG96utygwlOV7WzKBl5Q=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=fu1pdo508oRVO7gBYOkinPB4M6G4Lded1k7PV1vJg5tir3ycJipj763MstSN6aF5B uoxzs9QkoBGc1FOLudCPdKZgrQINKlM/hIAzDI/Yslm/M8iEz6dsKW4jEQut80gbKu YyqHXjy6azTosbVvqGbyawSLFQ9bQjbdUl3wvD5A= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Biju Das , Frank Li , Claudiu Beznea , Vinod Koul Subject: [PATCH 6.1 108/312] dmaengine: sh: rz-dmac: Move CHCTRL updates under spinlock Date: Wed, 8 Apr 2026 20:00:25 +0200 Message-ID: <20260408175937.797431193@linuxfoundation.org> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260408175933.715315542@linuxfoundation.org> References: <20260408175933.715315542@linuxfoundation.org> User-Agent: quilt/0.69 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 6.1-stable review patch. If anyone has any objections, please let me know. ------------------ From: Claudiu Beznea commit 89a8567d84bde88cb7cdbbac2ab2299c4f991490 upstream. Both rz_dmac_disable_hw() and rz_dmac_irq_handle_channel() update the CHCTRL register. To avoid concurrency issues when configuring functionalities exposed by this registers, take the virtual channel lock. All other CHCTRL updates were already protected by the same lock. Previously, rz_dmac_disable_hw() disabled and re-enabled local IRQs, before accessing CHCTRL registers but this does not ensure race-free access. Remove the local IRQ disable/enable code as well. Fixes: 5000d37042a6 ("dmaengine: sh: Add DMAC driver for RZ/G2L SoC") Cc: stable@vger.kernel.org Reviewed-by: Biju Das Reviewed-by: Frank Li Signed-off-by: Claudiu Beznea Link: https://patch.msgid.link/20260316133252.240348-3-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Vinod Koul Signed-off-by: Greg Kroah-Hartman --- drivers/dma/sh/rz-dmac.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) --- a/drivers/dma/sh/rz-dmac.c +++ b/drivers/dma/sh/rz-dmac.c @@ -286,13 +286,10 @@ static void rz_dmac_disable_hw(struct rz { struct dma_chan *chan = &channel->vc.chan; struct rz_dmac *dmac = to_rz_dmac(chan->device); - unsigned long flags; dev_dbg(dmac->dev, "%s channel %d\n", __func__, channel->index); - local_irq_save(flags); rz_dmac_ch_writel(channel, CHCTRL_DEFAULT, CHCTRL, 1); - local_irq_restore(flags); } static void rz_dmac_set_dmars_register(struct rz_dmac *dmac, int nr, u32 dmars) @@ -545,8 +542,8 @@ static int rz_dmac_terminate_all(struct unsigned int i; LIST_HEAD(head); - rz_dmac_disable_hw(channel); spin_lock_irqsave(&channel->vc.lock, flags); + rz_dmac_disable_hw(channel); for (i = 0; i < DMAC_NR_LMDESC; i++) lmdesc[i].header = 0; @@ -676,7 +673,9 @@ static void rz_dmac_irq_handle_channel(s if (chstat & CHSTAT_ER) { dev_err(dmac->dev, "DMAC err CHSTAT_%d = %08X\n", channel->index, chstat); - rz_dmac_ch_writel(channel, CHCTRL_DEFAULT, CHCTRL, 1); + + scoped_guard(spinlock_irqsave, &channel->vc.lock) + rz_dmac_ch_writel(channel, CHCTRL_DEFAULT, CHCTRL, 1); goto done; }