From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6A3FC3AE1A3; Fri, 10 Apr 2026 08:18:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775809137; cv=none; b=AiX6Xldgm11jSHxq4H4sj6bfLSUcZtkI1kgjwVbYLV25PIsYAHdIYnh5e9maQTYw1e00ZpLvLvGxO6IO+zAPoDFGGyPu0HHGe5HsH5JP9W873AIFl0CQkM2QZ1Z+gp0TZ7N1oNBTzoa4truDN23onQ3ZomzwmGPuy8H7msMMy9g= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775809137; c=relaxed/simple; bh=6qpvDK+D39vYskh1A0D06Ay6d+QTGZD5ES00ceu6HvQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=gdsN9+W1L0HOaI1ouXsDG6U1P3nHk8mCbBZRVHVe9Peyc3JU9VurcscIdNxQ2ugu5VVYPdongwwWUFMrwZ+Z4mv7KpyMh3H0psaFzqNWo0NQIvabVLhdGdMCNw4WxjKN4Fokc/XzWut+s4VL/LHREAac4YtMM0vMVcqJ2Q+Gsag= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=LrukzgyA; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="LrukzgyA" Received: by smtp.kernel.org (Postfix) with ESMTPSA id CFF33C4AF0E; Fri, 10 Apr 2026 08:18:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1775809136; bh=6qpvDK+D39vYskh1A0D06Ay6d+QTGZD5ES00ceu6HvQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=LrukzgyAG0McZs9Q9eguGVr33ZLSuVZzD/J9PyVfw840gjRdf8Pll0o8d3Kp1M5Fa LSi8zQp/pEWRDx56Yz0A2uolGWs4hmtLDoCgZzisms67KPNuJ7R5n1UK8Xv88+t42b xdeBrYovNNNc98qE6m8paGpQHeURAxVenuE31cALjIbVdqZBWhu3gXTgJT58UlJheN VAAteDFLWbI4UDj/A6q3OOmlR1M9csJ4wlh2pK5NAHJaSudcHtq7GQFFdWs3CuUfg5 /0T+vZDzy3CqxzTO0p0cHJHOudwr46C/bPnRGJEa1Ib+KD2rxvTefIoUaA9S1+AbRx w94IkhqtwXOKQ== Received: from johan by xi.lan with local (Exim 4.98.2) (envelope-from ) id 1wB74o-000000026v6-0KYC; Fri, 10 Apr 2026 10:18:54 +0200 From: Johan Hovold To: Mark Brown Cc: Matthias Brugger , AngeloGioacchino Del Regno , Frank Li , Sascha Hauer , Andrew Jeffery , Avi Fishman , Tomer Maimon , Tali Perry , Linus Walleij , Andi Shyti , Tudor Ambarus , Paul Walmsley , Samuel Holland , Orson Zhai , Baolin Wang , Jernej Skrabec , Masahisa Kojima , Jassi Brar , Laxman Dewangan , Kunihiko Hayashi , Masami Hiramatsu , Michal Simek , linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold , stable@vger.kernel.org, Naga Sureshkumar Relli Subject: [PATCH 26/26] spi: zynq-qspi: fix controller deregistration Date: Fri, 10 Apr 2026 10:17:56 +0200 Message-ID: <20260410081757.503099-27-johan@kernel.org> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20260410081757.503099-1-johan@kernel.org> References: <20260410081757.503099-1-johan@kernel.org> Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Make sure to deregister the controller before disabling it during driver unbind. Note that clocks were also disabled before the recent commit 1f8fd9490e31 ("spi: zynq-qspi: Simplify clock handling with devm_clk_get_enabled()"). Fixes: 67dca5e580f1 ("spi: spi-mem: Add support for Zynq QSPI controller") Cc: stable@vger.kernel.org # 5.2: 8eb2fd00f65a Cc: stable@vger.kernel.org # 5.2 Cc: Naga Sureshkumar Relli Signed-off-by: Johan Hovold --- drivers/spi/spi-zynq-qspi.c | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/drivers/spi/spi-zynq-qspi.c b/drivers/spi/spi-zynq-qspi.c index af252500195c..406fd9d5337e 100644 --- a/drivers/spi/spi-zynq-qspi.c +++ b/drivers/spi/spi-zynq-qspi.c @@ -643,7 +643,7 @@ static int zynq_qspi_probe(struct platform_device *pdev) xqspi = spi_controller_get_devdata(ctlr); xqspi->dev = dev; - platform_set_drvdata(pdev, xqspi); + platform_set_drvdata(pdev, ctlr); xqspi->regs = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(xqspi->regs)) { ret = PTR_ERR(xqspi->regs); @@ -702,9 +702,9 @@ static int zynq_qspi_probe(struct platform_device *pdev) /* QSPI controller initializations */ zynq_qspi_init_hw(xqspi, ctlr->num_chipselect); - ret = devm_spi_register_controller(&pdev->dev, ctlr); + ret = spi_register_controller(ctlr); if (ret) { - dev_err(&pdev->dev, "devm_spi_register_controller failed\n"); + dev_err(&pdev->dev, "failed to register controller\n"); goto remove_ctlr; } @@ -728,9 +728,16 @@ static int zynq_qspi_probe(struct platform_device *pdev) */ static void zynq_qspi_remove(struct platform_device *pdev) { - struct zynq_qspi *xqspi = platform_get_drvdata(pdev); + struct spi_controller *ctlr = platform_get_drvdata(pdev); + struct zynq_qspi *xqspi = spi_controller_get_devdata(ctlr); + + spi_controller_get(ctlr); + + spi_unregister_controller(ctlr); zynq_qspi_write(xqspi, ZYNQ_QSPI_ENABLE_OFFSET, 0); + + spi_controller_put(ctlr); } static const struct of_device_id zynq_qspi_of_match[] = { -- 2.52.0