[PATCH v2] iio: adc: xilinx-xadc: Fix sequencer mode in postdisable for dual mux

[PATCH v2] iio: adc: xilinx-xadc: Fix sequencer mode in postdisable for dual mux

[Christofer Jonason]

xadc_postdisable() unconditionally sets the sequencer to continuous
mode. For dual external multiplexer configurations this is incorrect:
simultaneous sampling mode is required so that ADC-A samples through
the mux on VAUX[0-7] while ADC-B simultaneously samples through the
mux on VAUX[8-15]. In continuous mode only ADC-A is active, so
VAUX[8-15] channels return incorrect data.

Since postdisable is also called from xadc_probe() to set the initial
idle state, the wrong sequencer mode is active from the moment the
driver loads.

The preenable path already uses xadc_get_seq_mode() which returns
SIMULTANEOUS for dual mux. Fix postdisable to do the same.

Fixes: bdc8cda1d010 ("iio:adc: Add Xilinx XADC driver")
Cc: stable@vger.kernel.org
Signed-off-by: Christofer Jonason <christofer.jonason@guidelinegeo.com>
---
Changes in v2:
  - Align continuation line to opening parenthesis (Andy)
 drivers/iio/adc/xilinx-xadc-core.c | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/drivers/iio/adc/xilinx-xadc-core.c b/drivers/iio/adc/xilinx-xadc-core.c
index e257c1b94..3980dfacb 100644
--- a/drivers/iio/adc/xilinx-xadc-core.c
+++ b/drivers/iio/adc/xilinx-xadc-core.c
@@ -817,6 +817,7 @@ static int xadc_postdisable(struct iio_dev *indio_dev)
 {
 	struct xadc *xadc = iio_priv(indio_dev);
 	unsigned long scan_mask;
+	int seq_mode;
 	int ret;
 	int i;
 
@@ -824,6 +825,12 @@ static int xadc_postdisable(struct iio_dev *indio_dev)
 	for (i = 0; i < indio_dev->num_channels; i++)
 		scan_mask |= BIT(indio_dev->channels[i].scan_index);
 
+	/*
+	 * Use the correct sequencer mode for the idle state: simultaneous
+	 * mode for dual external mux configurations, continuous otherwise.
+	 */
+	seq_mode = xadc_get_seq_mode(xadc, scan_mask);
+
 	/* Enable all channels and calibration */
 	ret = xadc_write_adc_reg(xadc, XADC_REG_SEQ(0), scan_mask & 0xffff);
 	if (ret)
@@ -834,11 +841,11 @@ static int xadc_postdisable(struct iio_dev *indio_dev)
 		return ret;
 
 	ret = xadc_update_adc_reg(xadc, XADC_REG_CONF1, XADC_CONF1_SEQ_MASK,
-		XADC_CONF1_SEQ_CONTINUOUS);
+				  seq_mode);
 	if (ret)
 		return ret;
 
-	return xadc_power_adc_b(xadc, XADC_CONF1_SEQ_CONTINUOUS);
+	return xadc_power_adc_b(xadc, seq_mode);
 }
 
 static int xadc_preenable(struct iio_dev *indio_dev)
-- 
2.47.3

Re: [PATCH v2] iio: adc: xilinx-xadc: Fix sequencer mode in postdisable for dual mux

[Nuno Sá]

On Wed, 2026-03-04 at 10:07 +0100, Christofer Jonason wrote:
> xadc_postdisable() unconditionally sets the sequencer to continuous
> mode. For dual external multiplexer configurations this is incorrect:
> simultaneous sampling mode is required so that ADC-A samples through
> the mux on VAUX[0-7] while ADC-B simultaneously samples through the
> mux on VAUX[8-15]. In continuous mode only ADC-A is active, so
> VAUX[8-15] channels return incorrect data.
> 
> Since postdisable is also called from xadc_probe() to set the initial
> idle state, the wrong sequencer mode is active from the moment the
> driver loads.
> 
> The preenable path already uses xadc_get_seq_mode() which returns
> SIMULTANEOUS for dual mux. Fix postdisable to do the same.
> 
> Fixes: bdc8cda1d010 ("iio:adc: Add Xilinx XADC driver")
> Cc: stable@vger.kernel.org
> Signed-off-by: Christofer Jonason <christofer.jonason@guidelinegeo.com>
> ---

From a code standpoint:

Reviewed-by: Nuno Sá <nuno.sa@analog.com>

> Changes in v2:
>   - Align continuation line to opening parenthesis (Andy)
>  drivers/iio/adc/xilinx-xadc-core.c | 11 +++++++++--
>  1 file changed, 9 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/iio/adc/xilinx-xadc-core.c b/drivers/iio/adc/xilinx-xadc-core.c
> index e257c1b94..3980dfacb 100644
> --- a/drivers/iio/adc/xilinx-xadc-core.c
> +++ b/drivers/iio/adc/xilinx-xadc-core.c
> @@ -817,6 +817,7 @@ static int xadc_postdisable(struct iio_dev *indio_dev)
>  {
>  	struct xadc *xadc = iio_priv(indio_dev);
>  	unsigned long scan_mask;
> +	int seq_mode;
>  	int ret;
>  	int i;
>  
> @@ -824,6 +825,12 @@ static int xadc_postdisable(struct iio_dev *indio_dev)
>  	for (i = 0; i < indio_dev->num_channels; i++)
>  		scan_mask |= BIT(indio_dev->channels[i].scan_index);
>  
> +	/*
> +	 * Use the correct sequencer mode for the idle state: simultaneous
> +	 * mode for dual external mux configurations, continuous otherwise.
> +	 */
> +	seq_mode = xadc_get_seq_mode(xadc, scan_mask);
> +
>  	/* Enable all channels and calibration */
>  	ret = xadc_write_adc_reg(xadc, XADC_REG_SEQ(0), scan_mask & 0xffff);
>  	if (ret)
> @@ -834,11 +841,11 @@ static int xadc_postdisable(struct iio_dev *indio_dev)
>  		return ret;
>  
>  	ret = xadc_update_adc_reg(xadc, XADC_REG_CONF1, XADC_CONF1_SEQ_MASK,
> -		XADC_CONF1_SEQ_CONTINUOUS);
> +				  seq_mode);
>  	if (ret)
>  		return ret;
>  
> -	return xadc_power_adc_b(xadc, XADC_CONF1_SEQ_CONTINUOUS);
> +	return xadc_power_adc_b(xadc, seq_mode);
>  }
>  
>  static int xadc_preenable(struct iio_dev *indio_dev)

Re: [PATCH v2] iio: adc: xilinx-xadc: Fix sequencer mode in postdisable for dual mux

[Andy Shevchenko]

On Wed, Mar 04, 2026 at 10:07:27AM +0100, Christofer Jonason wrote:
> xadc_postdisable() unconditionally sets the sequencer to continuous
> mode. For dual external multiplexer configurations this is incorrect:
> simultaneous sampling mode is required so that ADC-A samples through
> the mux on VAUX[0-7] while ADC-B simultaneously samples through the
> mux on VAUX[8-15]. In continuous mode only ADC-A is active, so
> VAUX[8-15] channels return incorrect data.
> 
> Since postdisable is also called from xadc_probe() to set the initial
> idle state, the wrong sequencer mode is active from the moment the
> driver loads.
> 
> The preenable path already uses xadc_get_seq_mode() which returns
> SIMULTANEOUS for dual mux. Fix postdisable to do the same.

Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com>

-- 
With Best Regards,
Andy Shevchenko

Re: [PATCH v2] iio: adc: xilinx-xadc: Fix sequencer mode in postdisable for dual mux

[Jonathan Cameron]

On Wed,  4 Mar 2026 10:07:27 +0100
Christofer Jonason <christofer.jonason@guidelinegeo.com> wrote:

> xadc_postdisable() unconditionally sets the sequencer to continuous
> mode. For dual external multiplexer configurations this is incorrect:
> simultaneous sampling mode is required so that ADC-A samples through
> the mux on VAUX[0-7] while ADC-B simultaneously samples through the
> mux on VAUX[8-15]. In continuous mode only ADC-A is active, so
> VAUX[8-15] channels return incorrect data.
> 
> Since postdisable is also called from xadc_probe() to set the initial
> idle state, the wrong sequencer mode is active from the moment the
> driver loads.
> 
> The preenable path already uses xadc_get_seq_mode() which returns
> SIMULTANEOUS for dual mux. Fix postdisable to do the same.
> 
> Fixes: bdc8cda1d010 ("iio:adc: Add Xilinx XADC driver")
> Cc: stable@vger.kernel.org
> Signed-off-by: Christofer Jonason <christofer.jonason@guidelinegeo.com>

I'll leave this on list for a little longer as I'd really like a confirmation
of this one from the AMD Xilinx folk.

Thanks,

Jonathan

> ---
> Changes in v2:
>   - Align continuation line to opening parenthesis (Andy)
>  drivers/iio/adc/xilinx-xadc-core.c | 11 +++++++++--
>  1 file changed, 9 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/iio/adc/xilinx-xadc-core.c b/drivers/iio/adc/xilinx-xadc-core.c
> index e257c1b94..3980dfacb 100644
> --- a/drivers/iio/adc/xilinx-xadc-core.c
> +++ b/drivers/iio/adc/xilinx-xadc-core.c
> @@ -817,6 +817,7 @@ static int xadc_postdisable(struct iio_dev *indio_dev)
>  {
>  	struct xadc *xadc = iio_priv(indio_dev);
>  	unsigned long scan_mask;
> +	int seq_mode;
>  	int ret;
>  	int i;
>  
> @@ -824,6 +825,12 @@ static int xadc_postdisable(struct iio_dev *indio_dev)
>  	for (i = 0; i < indio_dev->num_channels; i++)
>  		scan_mask |= BIT(indio_dev->channels[i].scan_index);
>  
> +	/*
> +	 * Use the correct sequencer mode for the idle state: simultaneous
> +	 * mode for dual external mux configurations, continuous otherwise.
> +	 */
> +	seq_mode = xadc_get_seq_mode(xadc, scan_mask);
> +
>  	/* Enable all channels and calibration */
>  	ret = xadc_write_adc_reg(xadc, XADC_REG_SEQ(0), scan_mask & 0xffff);
>  	if (ret)
> @@ -834,11 +841,11 @@ static int xadc_postdisable(struct iio_dev *indio_dev)
>  		return ret;
>  
>  	ret = xadc_update_adc_reg(xadc, XADC_REG_CONF1, XADC_CONF1_SEQ_MASK,
> -		XADC_CONF1_SEQ_CONTINUOUS);
> +				  seq_mode);
>  	if (ret)
>  		return ret;
>  
> -	return xadc_power_adc_b(xadc, XADC_CONF1_SEQ_CONTINUOUS);
> +	return xadc_power_adc_b(xadc, seq_mode);
>  }
>  
>  static int xadc_preenable(struct iio_dev *indio_dev)

Re: [PATCH v2] iio: adc: xilinx-xadc: Fix sequencer mode in postdisable for dual mux

[Michal Simek]

+Salih, Conall,

On 3/7/26 13:41, Jonathan Cameron wrote:
> On Wed,  4 Mar 2026 10:07:27 +0100
> Christofer Jonason <christofer.jonason@guidelinegeo.com> wrote:
> 
>> xadc_postdisable() unconditionally sets the sequencer to continuous
>> mode. For dual external multiplexer configurations this is incorrect:
>> simultaneous sampling mode is required so that ADC-A samples through
>> the mux on VAUX[0-7] while ADC-B simultaneously samples through the
>> mux on VAUX[8-15]. In continuous mode only ADC-A is active, so
>> VAUX[8-15] channels return incorrect data.
>>
>> Since postdisable is also called from xadc_probe() to set the initial
>> idle state, the wrong sequencer mode is active from the moment the
>> driver loads.
>>
>> The preenable path already uses xadc_get_seq_mode() which returns
>> SIMULTANEOUS for dual mux. Fix postdisable to do the same.
>>
>> Fixes: bdc8cda1d010 ("iio:adc: Add Xilinx XADC driver")
>> Cc: stable@vger.kernel.org
>> Signed-off-by: Christofer Jonason <christofer.jonason@guidelinegeo.com>
> 
> I'll leave this on list for a little longer as I'd really like a confirmation
> of this one from the AMD Xilinx folk.

Salih/Conall: Please look at this patch and provide your comment or tag.

Thanks,
Michal

Re: [PATCH v2] iio: adc: xilinx-xadc: Fix sequencer mode in postdisable for dual mux

[Christofer Jonason]

Gentle ping on this.

The fix aligns postdisable with preenable, which already uses
xadc_get_seq_mode() to select simultaneous mode for dual external
mux configurations.

Happy to answer any questions.

Thanks,
Christofer
________________________________________
From: Michal Simek <michal.simek@amd.com>
Sent: Tuesday, March 10, 2026 8:42 AM
To: Jonathan Cameron <jic23@kernel.org>; Christofer Jonason <christofer.jonason@guidelinegeo.com>; Salih Erim <salih.erim@amd.com>; O'Griofa, Conall <conall.ogriofa@amd.com>
Cc: lars@metafoo.de <lars@metafoo.de>; dlechner@baylibre.com <dlechner@baylibre.com>; nuno.sa@analog.com <nuno.sa@analog.com>; andy@kernel.org <andy@kernel.org>; Victor Jonsson <victor.jonsson@guidelinegeo.com>; linux-iio@vger.kernel.org <linux-iio@vger.kernel.org>; linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org>; linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org>; stable@vger.kernel.org <stable@vger.kernel.org>
Subject: Re: [PATCH v2] iio: adc: xilinx-xadc: Fix sequencer mode in postdisable for dual mux
 
+Salih, Conall,

On 3/7/26 13:41, Jonathan Cameron wrote:
> On Wed,  4 Mar 2026 10:07:27 +0100
> Christofer Jonason <christofer.jonason@guidelinegeo.com> wrote:
>
>> xadc_postdisable() unconditionally sets the sequencer to continuous
>> mode. For dual external multiplexer configurations this is incorrect:
>> simultaneous sampling mode is required so that ADC-A samples through
>> the mux on VAUX[0-7] while ADC-B simultaneously samples through the
>> mux on VAUX[8-15]. In continuous mode only ADC-A is active, so
>> VAUX[8-15] channels return incorrect data.
>>
>> Since postdisable is also called from xadc_probe() to set the initial
>> idle state, the wrong sequencer mode is active from the moment the
>> driver loads.
>>
>> The preenable path already uses xadc_get_seq_mode() which returns
>> SIMULTANEOUS for dual mux. Fix postdisable to do the same.
>>
>> Fixes: bdc8cda1d010 ("iio:adc: Add Xilinx XADC driver")
>> Cc: stable@vger.kernel.org
>> Signed-off-by: Christofer Jonason <christofer.jonason@guidelinegeo.com>
>
> I'll leave this on list for a little longer as I'd really like a confirmation
> of this one from the AMD Xilinx folk.

Salih/Conall: Please look at this patch and provide your comment or tag.

Thanks,
Michal

RE: [PATCH v2] iio: adc: xilinx-xadc: Fix sequencer mode in postdisable for dual mux

[Erim, Salih]

[AMD Official Use Only - AMD Internal Distribution Only]

Hi Christofer,

The code change looks correct to me - it aligns postdisable with
preenable by reusing xadc_get_seq_mode(), and the scope is limited
to dual external mux configurations.

Since this is targeting stable, could you please share what hardware/board
this was tested on and how you verified that VAUX[8-15] channels
return correct data with the fix applied?

Reviewed-by: Salih Emin <salih.emin@amd.com>

Thanks,
Salih


> -----Original Message-----
> From: Simek, Michal <michal.simek@amd.com>
> Sent: Tuesday, March 10, 2026 7:43 AM
> To: Jonathan Cameron <jic23@kernel.org>; Christofer Jonason
> <christofer.jonason@guidelinegeo.com>; Erim, Salih <Salih.Erim@amd.com>;
> O'Griofa, Conall <conall.ogriofa@amd.com>
> Cc: lars@metafoo.de; dlechner@baylibre.com; nuno.sa@analog.com;
> andy@kernel.org; victor.jonsson@guidelinegeo.com; linux-iio@vger.kernel.org;
> linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org;
> stable@vger.kernel.org
> Subject: Re: [PATCH v2] iio: adc: xilinx-xadc: Fix sequencer mode in postdisable
> for dual mux
>
> +Salih, Conall,
>
> On 3/7/26 13:41, Jonathan Cameron wrote:
> > On Wed,  4 Mar 2026 10:07:27 +0100
> > Christofer Jonason <christofer.jonason@guidelinegeo.com> wrote:
> >
> >> xadc_postdisable() unconditionally sets the sequencer to continuous
> >> mode. For dual external multiplexer configurations this is incorrect:
> >> simultaneous sampling mode is required so that ADC-A samples through
> >> the mux on VAUX[0-7] while ADC-B simultaneously samples through the
> >> mux on VAUX[8-15]. In continuous mode only ADC-A is active, so
> >> VAUX[8-15] channels return incorrect data.
> >>
> >> Since postdisable is also called from xadc_probe() to set the initial
> >> idle state, the wrong sequencer mode is active from the moment the
> >> driver loads.
> >>
> >> The preenable path already uses xadc_get_seq_mode() which returns
> >> SIMULTANEOUS for dual mux. Fix postdisable to do the same.
> >>
> >> Fixes: bdc8cda1d010 ("iio:adc: Add Xilinx XADC driver")
> >> Cc: stable@vger.kernel.org
> >> Signed-off-by: Christofer Jonason
> >> <christofer.jonason@guidelinegeo.com>
> >
> > I'll leave this on list for a little longer as I'd really like a
> > confirmation of this one from the AMD Xilinx folk.
>
> Salih/Conall: Please look at this patch and provide your comment or tag.
>
> Thanks,
> Michal

RE: [PATCH v2] iio: adc: xilinx-xadc: Fix sequencer mode in postdisable for dual mux

[Erim, Salih]

[AMD Official Use Only - AMD Internal Distribution Only]

Reviewed-by: Salih Erim <salih.erim@amd.com>

> -----Original Message-----
> From: Erim, Salih
> Sent: Wednesday, April 1, 2026 2:12 PM
> To: Simek, Michal <michal.simek@amd.com>; Jonathan Cameron
> <jic23@kernel.org>; Christofer Jonason <christofer.jonason@guidelinegeo.com>;
> O'Griofa, Conall <conall.ogriofa@amd.com>
> Cc: lars@metafoo.de; dlechner@baylibre.com; nuno.sa@analog.com;
> andy@kernel.org; victor.jonsson@guidelinegeo.com; linux-iio@vger.kernel.org;
> linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org;
> stable@vger.kernel.org
> Subject: RE: [PATCH v2] iio: adc: xilinx-xadc: Fix sequencer mode in postdisable
> for dual mux
>
> Hi Christofer,
>
> The code change looks correct to me - it aligns postdisable with preenable by
> reusing xadc_get_seq_mode(), and the scope is limited to dual external mux
> configurations.
>
> Since this is targeting stable, could you please share what hardware/board this was
> tested on and how you verified that VAUX[8-15] channels return correct data with
> the fix applied?
>
> Reviewed-by: Salih Emin <salih.emin@amd.com>
>
> Thanks,
> Salih
>
>
> > -----Original Message-----
> > From: Simek, Michal <michal.simek@amd.com>
> > Sent: Tuesday, March 10, 2026 7:43 AM
> > To: Jonathan Cameron <jic23@kernel.org>; Christofer Jonason
> > <christofer.jonason@guidelinegeo.com>; Erim, Salih
> > <Salih.Erim@amd.com>; O'Griofa, Conall <conall.ogriofa@amd.com>
> > Cc: lars@metafoo.de; dlechner@baylibre.com; nuno.sa@analog.com;
> > andy@kernel.org; victor.jonsson@guidelinegeo.com;
> > linux-iio@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
> > linux-kernel@vger.kernel.org; stable@vger.kernel.org
> > Subject: Re: [PATCH v2] iio: adc: xilinx-xadc: Fix sequencer mode in
> > postdisable for dual mux
> >
> > +Salih, Conall,
> >
> > On 3/7/26 13:41, Jonathan Cameron wrote:
> > > On Wed,  4 Mar 2026 10:07:27 +0100
> > > Christofer Jonason <christofer.jonason@guidelinegeo.com> wrote:
> > >
> > >> xadc_postdisable() unconditionally sets the sequencer to continuous
> > >> mode. For dual external multiplexer configurations this is incorrect:
> > >> simultaneous sampling mode is required so that ADC-A samples
> > >> through the mux on VAUX[0-7] while ADC-B simultaneously samples
> > >> through the mux on VAUX[8-15]. In continuous mode only ADC-A is
> > >> active, so VAUX[8-15] channels return incorrect data.
> > >>
> > >> Since postdisable is also called from xadc_probe() to set the
> > >> initial idle state, the wrong sequencer mode is active from the
> > >> moment the driver loads.
> > >>
> > >> The preenable path already uses xadc_get_seq_mode() which returns
> > >> SIMULTANEOUS for dual mux. Fix postdisable to do the same.
> > >>
> > >> Fixes: bdc8cda1d010 ("iio:adc: Add Xilinx XADC driver")
> > >> Cc: stable@vger.kernel.org
> > >> Signed-off-by: Christofer Jonason
> > >> <christofer.jonason@guidelinegeo.com>
> > >
> > > I'll leave this on list for a little longer as I'd really like a
> > > confirmation of this one from the AMD Xilinx folk.
> >
> > Salih/Conall: Please look at this patch and provide your comment or tag.
> >
> > Thanks,
> > Michal

RE: [PATCH v2] iio: adc: xilinx-xadc: Fix sequencer mode in postdisable for dual mux

[Erim, Salih]

Hi, 

> -----Original Message-----
> From: Erim, Salih <Salih.Erim@amd.com>
> Sent: Wednesday, April 1, 2026 2:13 PM
> To: Simek, Michal <michal.simek@amd.com>; Jonathan Cameron
> <jic23@kernel.org>; Christofer Jonason <christofer.jonason@guidelinegeo.com>;
> O'Griofa, Conall <conall.ogriofa@amd.com>
> Cc: lars@metafoo.de; dlechner@baylibre.com; nuno.sa@analog.com;
> andy@kernel.org; victor.jonsson@guidelinegeo.com; linux-iio@vger.kernel.org;
> linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org;
> stable@vger.kernel.org
> Subject: RE: [PATCH v2] iio: adc: xilinx-xadc: Fix sequencer mode in postdisable
> for dual mux
> 
> Caution: This message originated from an External Source. Use proper caution
> when opening attachments, clicking links, or responding.
> 
> 
> [AMD Official Use Only - AMD Internal Distribution Only]

I am deeply sorry about these markings. Please try to ignore them, and I will do my best to escape from them.

> 
> Reviewed-by: Salih Erim <salih.erim@amd.com>
> 
> > -----Original Message-----
> > From: Erim, Salih
> > Sent: Wednesday, April 1, 2026 2:12 PM
> > To: Simek, Michal <michal.simek@amd.com>; Jonathan Cameron
> > <jic23@kernel.org>; Christofer Jonason
> > <christofer.jonason@guidelinegeo.com>;
> > O'Griofa, Conall <conall.ogriofa@amd.com>
> > Cc: lars@metafoo.de; dlechner@baylibre.com; nuno.sa@analog.com;
> > andy@kernel.org; victor.jonsson@guidelinegeo.com;
> > linux-iio@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
> > linux-kernel@vger.kernel.org; stable@vger.kernel.org
> > Subject: RE: [PATCH v2] iio: adc: xilinx-xadc: Fix sequencer mode in
> > postdisable for dual mux
> >
> > Hi Christofer,
> >
> > The code change looks correct to me - it aligns postdisable with
> > preenable by reusing xadc_get_seq_mode(), and the scope is limited to
> > dual external mux configurations.
> >
> > Since this is targeting stable, could you please share what
> > hardware/board this was tested on and how you verified that VAUX[8-15]
> > channels return correct data with the fix applied?
> >
> > Reviewed-by: Salih Emin <salih.emin@amd.com>
> >
> > Thanks,
> > Salih
> >
> >
> > > -----Original Message-----
> > > From: Simek, Michal <michal.simek@amd.com>
> > > Sent: Tuesday, March 10, 2026 7:43 AM
> > > To: Jonathan Cameron <jic23@kernel.org>; Christofer Jonason
> > > <christofer.jonason@guidelinegeo.com>; Erim, Salih
> > > <Salih.Erim@amd.com>; O'Griofa, Conall <conall.ogriofa@amd.com>
> > > Cc: lars@metafoo.de; dlechner@baylibre.com; nuno.sa@analog.com;
> > > andy@kernel.org; victor.jonsson@guidelinegeo.com;
> > > linux-iio@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
> > > linux-kernel@vger.kernel.org; stable@vger.kernel.org
> > > Subject: Re: [PATCH v2] iio: adc: xilinx-xadc: Fix sequencer mode in
> > > postdisable for dual mux
> > >
> > > +Salih, Conall,
> > >
> > > On 3/7/26 13:41, Jonathan Cameron wrote:
> > > > On Wed,  4 Mar 2026 10:07:27 +0100 Christofer Jonason
> > > > <christofer.jonason@guidelinegeo.com> wrote:
> > > >
> > > >> xadc_postdisable() unconditionally sets the sequencer to
> > > >> continuous mode. For dual external multiplexer configurations this is
> incorrect:
> > > >> simultaneous sampling mode is required so that ADC-A samples
> > > >> through the mux on VAUX[0-7] while ADC-B simultaneously samples
> > > >> through the mux on VAUX[8-15]. In continuous mode only ADC-A is
> > > >> active, so VAUX[8-15] channels return incorrect data.
> > > >>
> > > >> Since postdisable is also called from xadc_probe() to set the
> > > >> initial idle state, the wrong sequencer mode is active from the
> > > >> moment the driver loads.
> > > >>
> > > >> The preenable path already uses xadc_get_seq_mode() which returns
> > > >> SIMULTANEOUS for dual mux. Fix postdisable to do the same.
> > > >>
> > > >> Fixes: bdc8cda1d010 ("iio:adc: Add Xilinx XADC driver")
> > > >> Cc: stable@vger.kernel.org
> > > >> Signed-off-by: Christofer Jonason
> > > >> <christofer.jonason@guidelinegeo.com>
> > > >
> > > > I'll leave this on list for a little longer as I'd really like a
> > > > confirmation of this one from the AMD Xilinx folk.
> > >
> > > Salih/Conall: Please look at this patch and provide your comment or tag.
> > >
> > > Thanks,
> > > Michal

As I mentioned earlier, I have reviewed and it looks correct to me. 
It would be good if Christopher could share testing environment and results.

Reviewed-by: Salih Emin <salih.emin@amd.com>

Thanks, 
Salih.

Re: [PATCH v2] iio: adc: xilinx-xadc: Fix sequencer mode in postdisable for dual mux

[Andy Shevchenko]

On Wed, Apr 1, 2026 at 4:58 PM Erim, Salih <Salih.Erim@amd.com> wrote:
> > -----Original Message-----
> > From: Erim, Salih <Salih.Erim@amd.com>
> > Sent: Wednesday, April 1, 2026 2:13 PM


> > Caution: This message originated from an External Source. Use proper caution
> > when opening attachments, clicking links, or responding.
> >
> > [AMD Official Use Only - AMD Internal Distribution Only]
>
> I am deeply sorry about these markings. Please try to ignore them, and I will do my best to escape from them.

Maybe, but ignoring them might be subject to law enforcement or other
legal actions. You must get rid of them for your OSS contributions.

-- 
With Best Regards,
Andy Shevchenko

RE: [PATCH v2] iio: adc: xilinx-xadc: Fix sequencer mode in postdisable for dual mux

[Erim, Salih]

Hi Andy, 

... 
> On Wed, Apr 1, 2026 at 4:58 PM Erim, Salih <Salih.Erim@amd.com> wrote:
> > > -----Original Message-----
> > > From: Erim, Salih <Salih.Erim@amd.com>
> > > Sent: Wednesday, April 1, 2026 2:13 PM
> 
> 
> > > Caution: This message originated from an External Source. Use proper
> > > caution when opening attachments, clicking links, or responding.
> > >
> > > [AMD Official Use Only - AMD Internal Distribution Only]
> >
> > I am deeply sorry about these markings. Please try to ignore them, and I will do
> my best to escape from them.
> 
> Maybe, but ignoring them might be subject to law enforcement or other legal actions.
> You must get rid of them for your OSS contributions.

You are right, My mistake is replying OSS emails with Outlook, it does marking automatically.
I need to start using another email - mutt, thunderbird etc. Thanks for the warning.

> 
> --
> With Best Regards,
> Andy Shevchenko

Thanks,
Salih.

Re: [PATCH v2] iio: adc: xilinx-xadc: Fix sequencer mode in postdisable for dual mux

[Christofer Jonason]

Hi Salih,

Thanks for the review.

Tested on a custom Zynq-7030 board with two TMUX1308APWR analog
multiplexers in dual external mux configuration. The XADC is
instantiated as an AXI XADC Wizard IP with xlnx,external-mux
set to "dual" and xlnx,external-mux-channel set to 1.

Verified by reading all 16 external mux channels via sysfs
(in_voltageN_raw) and comparing against known reference voltages
on the board. Before the fix, channels routed through ADC-B
returned incorrect values. After the fix, all channels return
the expected voltages matching the board schematic.

Thanks,
Christofer
________________________________________
From: Erim, Salih <Salih.Erim@amd.com>
Sent: Wednesday, April 1, 2026 3:11 PM
To: Simek, Michal <michal.simek@amd.com>; Jonathan Cameron <jic23@kernel.org>; Christofer Jonason <christofer.jonason@guidelinegeo.com>; O'Griofa, Conall <conall.ogriofa@amd.com>
Cc: lars@metafoo.de <lars@metafoo.de>; dlechner@baylibre.com <dlechner@baylibre.com>; nuno.sa@analog.com <nuno.sa@analog.com>; andy@kernel.org <andy@kernel.org>; Victor Jonsson <victor.jonsson@guidelinegeo.com>; linux-iio@vger.kernel.org <linux-iio@vger.kernel.org>; linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org>; linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org>; stable@vger.kernel.org <stable@vger.kernel.org>
Subject: RE: [PATCH v2] iio: adc: xilinx-xadc: Fix sequencer mode in postdisable for dual mux
 
[AMD Official Use Only - AMD Internal Distribution Only]

Hi Christofer,

The code change looks correct to me - it aligns postdisable with
preenable by reusing xadc_get_seq_mode(), and the scope is limited
to dual external mux configurations.

Since this is targeting stable, could you please share what hardware/board
this was tested on and how you verified that VAUX[8-15] channels
return correct data with the fix applied?

Reviewed-by: Salih Emin <salih.emin@amd.com>

Thanks,
Salih


> -----Original Message-----
> From: Simek, Michal <michal.simek@amd.com>
> Sent: Tuesday, March 10, 2026 7:43 AM
> To: Jonathan Cameron <jic23@kernel.org>; Christofer Jonason
> <christofer.jonason@guidelinegeo.com>; Erim, Salih <Salih.Erim@amd.com>;
> O'Griofa, Conall <conall.ogriofa@amd.com>
> Cc: lars@metafoo.de; dlechner@baylibre.com; nuno.sa@analog.com;
> andy@kernel.org; victor.jonsson@guidelinegeo.com; linux-iio@vger.kernel.org;
> linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org;
> stable@vger.kernel.org
> Subject: Re: [PATCH v2] iio: adc: xilinx-xadc: Fix sequencer mode in postdisable
> for dual mux
>
> +Salih, Conall,
>
> On 3/7/26 13:41, Jonathan Cameron wrote:
> > On Wed,  4 Mar 2026 10:07:27 +0100
> > Christofer Jonason <christofer.jonason@guidelinegeo.com> wrote:
> >
> >> xadc_postdisable() unconditionally sets the sequencer to continuous
> >> mode. For dual external multiplexer configurations this is incorrect:
> >> simultaneous sampling mode is required so that ADC-A samples through
> >> the mux on VAUX[0-7] while ADC-B simultaneously samples through the
> >> mux on VAUX[8-15]. In continuous mode only ADC-A is active, so
> >> VAUX[8-15] channels return incorrect data.
> >>
> >> Since postdisable is also called from xadc_probe() to set the initial
> >> idle state, the wrong sequencer mode is active from the moment the
> >> driver loads.
> >>
> >> The preenable path already uses xadc_get_seq_mode() which returns
> >> SIMULTANEOUS for dual mux. Fix postdisable to do the same.
> >>
> >> Fixes: bdc8cda1d010 ("iio:adc: Add Xilinx XADC driver")
> >> Cc: stable@vger.kernel.org
> >> Signed-off-by: Christofer Jonason
> >> <christofer.jonason@guidelinegeo.com>
> >
> > I'll leave this on list for a little longer as I'd really like a
> > confirmation of this one from the AMD Xilinx folk.
>
> Salih/Conall: Please look at this patch and provide your comment or tag.
>
> Thanks,
> Michal

RE: [PATCH v2] iio: adc: xilinx-xadc: Fix sequencer mode in postdisable for dual mux

[Erim, Salih]

Hi Christofer,

Thanks for the details. That confirms it.

Jonathan - this one is good to go from our side.


Thanks,
Salih.

Re: [PATCH v2] iio: adc: xilinx-xadc: Fix sequencer mode in postdisable for dual mux

[Jonathan Cameron]

On Tue, 7 Apr 2026 14:30:57 +0000
"Erim, Salih" <Salih.Erim@amd.com> wrote:

> Hi Christofer,
> 
> Thanks for the details. That confirms it.
> 
> Jonathan - this one is good to go from our side.
> 
> 
Applied to the fixes-togreg branch of iio.git
Very unlikely I'll do another pull request before rebasing that tree
on rc1 though, so it will be a few weeks.

> Thanks,
> Salih.
>