From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B25293B774B for ; Mon, 13 Apr 2026 14:58:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776092286; cv=none; b=hNNkUMIEVjYF7lrbILdcrF2m2LZDsm1QbRraos2eJtBaAp/ZShNjvuUlYlmbUwTZx30vfUAcAxpeRsinUwJ+BwI5OsvgOHORf9cdvXD4fsm6SNiKnMMXvocrkLBXnJpwAW5QZsjaW3oiz2gr9eJjEIuHgS0QObJXeP6wUjOXFnU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776092286; c=relaxed/simple; bh=E9ohNMj5R/r/58D/JLpDJ+ZaJ6bgO40183uua+xIBi4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=mPUCR0Vg9ecfGEbEeQrHtmBanOOelJhCOdj/KuVTV1Tl49HceFnmYUloUJmdsGT1T2FXgAZk2u43HXA+Cix10NGmdBTL0CkO4v0R0oabgEvq+L1wU0Wd9gtn9kibibK/ZmhPbwnOuacoQWlh56GTXiPYyE31pA+leOIOmE9MRbY= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=EJZ8s674; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="EJZ8s674" Received: by smtp.kernel.org (Postfix) with ESMTPSA id CDF21C2BCB0; Mon, 13 Apr 2026 14:58:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1776092286; bh=E9ohNMj5R/r/58D/JLpDJ+ZaJ6bgO40183uua+xIBi4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=EJZ8s674xh4EcKs/kfnwFdLItgG6on2vJ5AEQx0ZFMET6+MuxCxrxdRMoY/Gtg/An 9LkamNksK3hlYZV0UDrsN+/omuU+/NeRavg5HmrJzNTY5UAWaq5y24p4d5aJYD+KSN fqokrzjKkPBbIuV8xmy4u05O4YobT8E05xLYVpfiJs4PSy3uNsLrq4YuJreiuwQ20o fqAhagO1n+LiCBH5ZBc4/6GQVOjOM4f1qn6czfRfYCGTMU5KE6HrwkLl+ojFuT0yQK z6YynO36GVLRT3QxmbXaL7c3/S4pD+34QWdQkDSqMtkBZSOmg1BXb9O38CFFD3gqo6 Y7U8dcnWS9C7Q== From: Sasha Levin To: stable@vger.kernel.org Cc: Martin Kepplinger , Shawn Guo , Sasha Levin Subject: [PATCH 5.10.y 1/7] arm64: dts: imx8mq-librem5-r3: workaround i2c1 issue with 1GHz cpu voltage Date: Mon, 13 Apr 2026 10:57:58 -0400 Message-ID: <20260413145804.2968471-1-sashal@kernel.org> X-Mailer: git-send-email 2.53.0 In-Reply-To: <2026041310-reluctant-amaretto-6070@gregkh> References: <2026041310-reluctant-amaretto-6070@gregkh> Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Martin Kepplinger [ Upstream commit 1773b8d6697ac8e9380843fe5c13c25e95baa702 ] This is a workaround for a hardware bug in the r3 revision that basically would stop the system due to traffic on the i2c1 bus. A cpu voltage change would trigger such traffic and that's what is avoided in order to work around it. Signed-off-by: Martin Kepplinger Signed-off-by: Shawn Guo Stable-dep-of: 511f76bf1dce ("arm64: dts: imx8mq-librem5: Bump BUCK1 suspend voltage up to 0.85V") Signed-off-by: Sasha Levin --- arch/arm64/boot/dts/freescale/imx8mq-librem5-r3.dts | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mq-librem5-r3.dts b/arch/arm64/boot/dts/freescale/imx8mq-librem5-r3.dts index cc29223ca188c..cd3c3edd48fa3 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq-librem5-r3.dts +++ b/arch/arm64/boot/dts/freescale/imx8mq-librem5-r3.dts @@ -10,6 +10,12 @@ / { compatible = "purism,librem5r3", "purism,librem5", "fsl,imx8mq"; }; +&a53_opp_table { + opp-1000000000 { + opp-microvolt = <1000000>; + }; +}; + &accel_gyro { mount-matrix = "1", "0", "0", "0", "1", "0", -- 2.53.0