Re: [PATCH] drm/xe/xelp: Fix Wa_18022495364

Tvrtko Ursulin
2026-04-20T13:24:08Z

On 20/04/2026 14:16, Tvrtko Ursulin wrote:
> Command parser relative MMIO addressing needs to be enabled when writing
> to the register.
>
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
> Fixes: ca33cd271ef9 ("drm/xe/xelp: Add Wa_18022495364")
> Cc: Matt Roper <matthew.d.roper@intel.com>
> Cc: Matthew Brost <matthew.brost@intel.com>
> Cc: "Thomas Hellström" <thomas.hellstrom@linux.intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: <stable@vger.kernel.org> # v6.18+
> ---
> drivers/gpu/drm/xe/xe_lrc.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
> index 9d12a0d2f0b5..c725cde4508d 100644
> --- a/drivers/gpu/drm/xe/xe_lrc.c
> +++ b/drivers/gpu/drm/xe/xe_lrc.c
> @@ -1214,7 +1214,7 @@ static ssize_t setup_invalidate_state_cache_wa(struct xe_lrc *lrc,
> if (xe_gt_WARN_ON(lrc->gt, max_len < 3))
> return -ENOSPC;
>
> - *cmd++ = MI_LOAD_REGISTER_IMM | MI_LRI_NUM_REGS(1);
> + *cmd++ = MI_LOAD_REGISTER_IMM | MI_LRI_LRM_CS_MMIO | MI_LRI_NUM_REGS(1);

Or if this register exists only for RCS would it be better to define
CS_DEBUG_MODE2 as the absolute 0x20d8 (as in i915)? Unfortunately the
public TGL PRM does not list neither the register or the workaround so I
am not sure.

Regards,

Tvrtko

> *cmd++ = CS_DEBUG_MODE2(0).addr;
> *cmd++ = REG_MASKED_FIELD_ENABLE(INSTRUCTION_STATE_CACHE_INVALIDATE);
>