From: Greg KH <gregkh@linuxfoundation.org>
To: Haakon Bugge <haakon.bugge@oracle.com>
Cc: "stable@vger.kernel.org" <stable@vger.kernel.org>,
Bjorn Helgaas <bhelgaas@google.com>
Subject: Re: [PATCH 5.15.y] PCI/ACPI: Restrict program_hpx_type2() to AER bits
Date: Mon, 20 Apr 2026 14:32:23 +0200 [thread overview]
Message-ID: <2026042054-sandy-trolling-0cb3@gregkh> (raw)
In-Reply-To: <7226713B-8871-40FA-BAA1-6AC5E516AF46@oracle.com>
On Mon, Apr 20, 2026 at 12:20:05PM +0000, Haakon Bugge wrote:
> > commit 9abf79c8d7b40db0e5a34aa8c744ea60ff9a3fcf upstream.
> >
> > Previously program_hpx_type2() applied PCIe settings unconditionally,
> > which could incorrectly change bits like Extended Tag Field Enable and
> > Enable Relaxed Ordering.
> >
> > When _HPX was added to ACPI r3.0, the intent of the PCIe Setting
> > Record (Type 2) in sec 6.2.7.3 was to configure AER registers when the
> > OS does not own the AER Capability:
> >
> > The PCI Express setting record contains ... [the AER] Uncorrectable
> > Error Mask, Uncorrectable Error Severity, Correctable Error Mask
> > ... to be used when configuring registers in the Advanced Error
> > Reporting Extended Capability Structure ...
> >
> > OSPM [1] will only evaluate _HPX with Setting Record – Type 2 if
> > OSPM is not controlling the PCI Express Advanced Error Reporting
> > capability.
> >
> > ACPI r3.0b, sec 6.2.7.3, added more AER registers, including registers
> > in the PCIe Capability with AER-related bits, and the restriction that
> > the OS use this only when it owns PCIe native hotplug:
> >
> > ... when configuring PCI Express registers in the Advanced Error
> > Reporting Extended Capability Structure *or PCI Express Capability
> > Structure* ...
> >
> > An OS that has assumed ownership of native hot plug but does not
> > ... have ownership of the AER register set must use ... the Type 2
> > record to program the AER registers ...
> >
> > However, since the Type 2 record also includes register bits that
> > have functions other than AER, the OS must ignore values ... that
> > are not applicable.
> >
> > Restrict program_hpx_type2() to only the intended purpose:
> >
> > - Apply settings only when OS owns PCIe native hotplug but not AER,
> >
> > - Only touch the AER-related bits (Error Reporting Enables) in Device
> > Control
> >
> > - Don't touch Link Control at all, since nothing there seems AER-related,
> > but log _HPX settings for debugging purposes
> >
> > Note that Read Completion Boundary is now configured elsewhere, since it is
> > unrelated to _HPX.
> >
> > [1] Operating System-directed configuration and Power Management
> >
> > Fixes: 40abb96c51bb ("[PATCH] pciehp: Fix programming hotplug parameters")
> > Signed-off-by: Håkon Bugge <haakon.bugge@oracle.com>
> > Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
> > Link: https://patch.msgid.link/20260129175237.727059-3-haakon.bugge@oracle.com
> > [ Conflict in drivers/pci.h because the context has changed. ]
> > Signed-off-by: Håkon Bugge <haakon.bugge@oracle.com>
>
> I see this was not added to 5.15.203, hence a gentle ping on it.
The backlog for manually backported 5.15.y patches right now is over 100
patches long. You are in good company :)
thanks,
greg k-h
prev parent reply other threads:[~2026-04-20 12:32 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-11 17:17 [PATCH 5.15.y] PCI/ACPI: Restrict program_hpx_type2() to AER bits Håkon Bugge
2026-04-20 12:20 ` Haakon Bugge
2026-04-20 12:32 ` Greg KH [this message]
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