From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 009CB368968 for ; Fri, 8 May 2026 23:59:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778284767; cv=none; b=nUnOClE3i6SNy4pcHuRJ5TEf2Bhop5McAqXzN/OEZk2kW0Ssp2luA8Wk2bVwlxbWxfNFVWKSlrjKzufPqKVtyPY2BykyNIBKPc1Ki0WVIxD17qRfbJhrxWBKijhTcMAYLpdZW/N5DH2F5FMcqZFUWvZrOYBQ6I3tUqU71YAxjCU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778284767; c=relaxed/simple; bh=hZMG6ZoWVfU+aw+BAb1P3kNZwsx6/wQhA8gcGnXkfWw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=OdUqe6cWOJZr6pzyHsIXd/oKziBwazkYlo+BI20u51RezfJtOE29HsthDwKscL05Bi5lIA4Vse9CD6FTJk/hRonazcLXJ/vPg+XsrWwCFK+VsqPFjh0/dmonMw3fdANpBxI23wH4lbnsbmpVToJXzcEZ2CyWxzAOVO/IgpOpbjI= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=WyIw6vE8; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="WyIw6vE8" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 01522C2BCB0; Fri, 8 May 2026 23:59:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778284766; bh=hZMG6ZoWVfU+aw+BAb1P3kNZwsx6/wQhA8gcGnXkfWw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=WyIw6vE828OBkZYQR9OyWX9Z7OLfll7KVuhRq+QgVuL3PGnWthuk/1GEFpqhrhBkd YLWErDqJEDr9ihaWFeuv5Ldn6jHATCUkNHNWSZ5BsdN7fDU+g4441t1Bl0D4ZndmQu 8jecs5guc0BPco0H3x9OC13c1QSmZWHitKs8UEYndOqTYgBE+hdZq48v3g9bcFW06L wvlfNk6dISmgYHdcqplNbWiu8pyhnrFXnH+BCY8jvbpyRMXbCNZpeQ3lxf2M55Okwm xrKcD8SJ/WTGIRhO+gVkt7r41FcUnXrKy3wrMjKcgAlSM1hkeoGTXMb02TrX0oFGM4 om+WUrttp+5hw== From: Sasha Levin To: stable@vger.kernel.org Cc: Sanjaikumar V S , Hendrik Donner , "Pratyush Yadav (Google)" , Sasha Levin Subject: [PATCH 5.10.y] mtd: spi-nor: sst: Fix write enable before AAI sequence Date: Fri, 8 May 2026 19:59:24 -0400 Message-ID: <20260508235924.2244851-1-sashal@kernel.org> X-Mailer: git-send-email 2.53.0 In-Reply-To: <2026050406-underrate-pardon-df1c@gregkh> References: <2026050406-underrate-pardon-df1c@gregkh> Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Sanjaikumar V S [ Upstream commit a0f64241d3566a49c0a9b33ba7ae458ae22003a9 ] When writing to SST flash starting at an odd address, a single byte is first programmed using the byte program (BP) command. After this operation completes, the flash hardware automatically clears the Write Enable Latch (WEL) bit. If an AAI (Auto Address Increment) word program sequence follows, it requires WEL to be set. Without re-enabling writes, the AAI sequence fails. Add spi_nor_write_enable() after the odd-address byte program when more data needs to be written. Use a local boolean for clarity. Fixes: b199489d37b2 ("mtd: spi-nor: add the framework for SPI NOR") Cc: stable@vger.kernel.org Signed-off-by: Sanjaikumar V S Tested-by: Hendrik Donner Reviewed-by: Hendrik Donner Signed-off-by: Pratyush Yadav (Google) [ kept inline `nor->program_opcode = SPINOR_OP_BP;` ] Signed-off-by: Sasha Levin --- drivers/mtd/spi-nor/sst.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/mtd/spi-nor/sst.c b/drivers/mtd/spi-nor/sst.c index 0ab07624fb73f..777c8225f5bdc 100644 --- a/drivers/mtd/spi-nor/sst.c +++ b/drivers/mtd/spi-nor/sst.c @@ -63,6 +63,8 @@ static int sst_write(struct mtd_info *mtd, loff_t to, size_t len, /* Start write from odd address. */ if (to % 2) { + bool needs_write_enable = (len > 1); + nor->program_opcode = SPINOR_OP_BP; /* write one byte. */ @@ -76,6 +78,17 @@ static int sst_write(struct mtd_info *mtd, loff_t to, size_t len, to++; actual++; + + /* + * Byte program clears the write enable latch. If more + * data needs to be written using the AAI sequence, + * re-enable writes. + */ + if (needs_write_enable) { + ret = spi_nor_write_enable(nor); + if (ret) + goto out; + } } /* Write out most of the data here. */ -- 2.53.0