From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E68EA3EDE48; Tue, 12 May 2026 18:01:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778608869; cv=none; b=J9TyvUnDbpoYzxLQNo0tKs6smAK+MCV8obwAducPQLxVTRVboUH0sGjP344S6naH1RJ2YmFLBGuXcVOjIyqVN7614ls/cmgs53NkYRXUL+lKdJ8x/Fvao4eqo+U0Ii/N7Xv8WSSqOSxRS2nWLk6Sfu2D21HYjuB9ouoRW3/D2qQ= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778608869; c=relaxed/simple; bh=aSypBrGsJkDKlMIXCEap6hOcoWJKvEtmSNJ5euEtlFo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=RfT4Q7Jnujf7XZjzKpo0JuvVB+YDKxy40Xq08H5RaGiiUaPMvb8+/9+Gin3HhCZtd+5faMwWPJB3dsYJXz6/VjbVxAbmDsz6GoNa+3LYEhvHB1ng866n9s1ofOTSFOin8S0gXB/CVfoDFPrfkQIcJJ1S3imDxdu1vPBMgC7JwAg= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=RA0QXdCQ; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="RA0QXdCQ" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7D9BFC2BCB0; Tue, 12 May 2026 18:01:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1778608868; bh=aSypBrGsJkDKlMIXCEap6hOcoWJKvEtmSNJ5euEtlFo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=RA0QXdCQK60Sn0v2wMZFKOdQ75NonffztBOlqEliXDNdlpfzDQ5N62MIAAHQ52e4s e+QRYMxA5HGW68mwS7SgF24cF5O5vtQ1fAd521DlI4QSTwzESnXW/F48g9nn0rl+xX ypIq1yurN8FoFMqaBQhONlpAVWmeVvi8O/9U3lgo= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Chao Li , Dongyan Qian , Huacai Chen Subject: [PATCH 6.18 245/270] LoongArch: Use per-root-bridge PCIH flag to skip mem resource fixup Date: Tue, 12 May 2026 19:40:46 +0200 Message-ID: <20260512173943.597585318@linuxfoundation.org> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260512173938.452574370@linuxfoundation.org> References: <20260512173938.452574370@linuxfoundation.org> User-Agent: quilt/0.69 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 6.18-stable review patch. If anyone has any objections, please let me know. ------------------ From: Huacai Chen commit 49f33840dcc907d21313d369e34872880846b61c upstream. When firmware enables 64-bit PCI host bridge support, some root bridges already provide valid 64-bit mem resource windows through ACPI. In this case, the LoongArch-specific mem resource high-bits fixup in acpi_prepare_root_resources() should not be applied unconditionally. Otherwise, the kernel may override the native resource layout derived from firmware, and later BAR assignment can fail to place device BARs into the intended 64-bit address space correctly. Add a per-root-bridge ACPI flag, PCIH, and evaluate it from the current root bridge device scope. When PCIH is set, skip the mem resource high- bits fixup path and let the kernel use the firmware-provided resource description directly. When PCIH is absent or cleared, keep the existing behavior and continue filling the high address bits from the host bridge address. This makes the behavior per-root-bridge configurable and avoids breaking valid 64-bit BAR space allocation on bridges whose 64-bit windows have already been fully described by firmware. Cc: stable@vger.kernel.org Suggested-by: Chao Li Tested-by: Dongyan Qian Signed-off-by: Dongyan Qian Signed-off-by: Huacai Chen Signed-off-by: Greg Kroah-Hartman --- arch/loongarch/pci/acpi.c | 5 +++++ 1 file changed, 5 insertions(+) --- a/arch/loongarch/pci/acpi.c +++ b/arch/loongarch/pci/acpi.c @@ -61,11 +61,16 @@ static void acpi_release_root_info(struc static int acpi_prepare_root_resources(struct acpi_pci_root_info *ci) { int status; + unsigned long long pci_h = 0; struct resource_entry *entry, *tmp; struct acpi_device *device = ci->bridge; status = acpi_pci_probe_root_resources(ci); if (status > 0) { + acpi_evaluate_integer(device->handle, "PCIH", NULL, &pci_h); + if (pci_h) + return status; + resource_list_for_each_entry_safe(entry, tmp, &ci->resources) { if (entry->res->flags & IORESOURCE_MEM) { entry->offset = ci->root->mcfg_addr & GENMASK_ULL(63, 40);