From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C82D93F58D6; Wed, 20 May 2026 18:07:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779300428; cv=none; b=kxJ2Z7Dv5xeOrdB1WVTX9LxSwcjWPmq6cq7sYZBXd3lmIRlnMomB5ufkAuDgJFzVop41UQBGiaaY3ahSQN10uIxYO/upY8c5FgrCoGch9XKyc6nO0UD3N1q4h22omZq17LgSYCzuigdkzrGNYuGscaJwHu887N5UMqnTgac5Va4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779300428; c=relaxed/simple; bh=sa8QYCSi470vYglnrL7va3lXifgUNya5uNmKpCCQ1Rc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=oWMLfLjUetVT86nAViQQE/3iC8Oy9vC2ytcjIxa2+E++LWhfAtB33Mzr9m9ylh196LFCRrCzEgHr8IVFPfyvIu/LI20yyn9GLWZVjG0p314gfOJc0q93n2yB8Wr0bhQnJ00h7LZBhfGKS9epl0USL2+jXMPIg61RFfBoYPkHDhQ= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=spwpyp3D; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="spwpyp3D" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 399961F000E9; Wed, 20 May 2026 18:07:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linuxfoundation.org; s=korg; t=1779300427; bh=KItrRBqLVTEVThbBvmKToR5UCeBnd/wp3QxDZMp//HA=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=spwpyp3D0c3g+RsCTy4BO1RNlbAJ4ybUw1SmTwHmglku/Y14AkKaG/ri8p+uR59LK h6APGWN3HuYzVfaX9DkaY5hfLdrtcYU9lcWgNU1pRP23LhvXXM5sK3NqYeS3D4c9H+ zOk4QUhsGJQl04WXnpsY1rBmzIfNnfRZxdrdBeyE= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Pei Xiao , Mark Brown , Sasha Levin Subject: [PATCH 6.12 164/666] spi: hisi-kunpeng: prevent infinite while() loop in hisi_spi_flush_fifo Date: Wed, 20 May 2026 18:16:15 +0200 Message-ID: <20260520162114.761559782@linuxfoundation.org> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260520162111.222830634@linuxfoundation.org> References: <20260520162111.222830634@linuxfoundation.org> User-Agent: quilt/0.69 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 6.12-stable review patch. If anyone has any objections, please let me know. ------------------ From: Pei Xiao [ Upstream commit 9f61daf2c2debe9f5cf4e1a4471e56a89a6fe45a ] The hisi_spi_flush_fifo()'s inner while loop that lacks any timeout mechanism. Maybe the hardware never becomes empty, the loop will spin forever, causing the CPU to hang. Fix this by adding a inner_limit based on loops_per_jiffy. The inner loop now exits after approximately one jiffy if the FIFO remains non-empty, logs a ratelimited warning, and breaks out of the outer loop. Additionally, add a cpu_relax() inside the busy loop to improve power efficiency. Fixes: c770d8631e18 ("spi: Add HiSilicon SPI Controller Driver for Kunpeng SoCs") Signed-off-by: Pei Xiao Link: https://patch.msgid.link/d834ce28172886bfaeb9c8ca00cfd9bf1c65d5a1.1773889292.git.xiaopei01@kylinos.cn Signed-off-by: Mark Brown Signed-off-by: Sasha Levin --- drivers/spi/spi-hisi-kunpeng.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-hisi-kunpeng.c b/drivers/spi/spi-hisi-kunpeng.c index f0a50f40a3ba1..77526f7940688 100644 --- a/drivers/spi/spi-hisi-kunpeng.c +++ b/drivers/spi/spi-hisi-kunpeng.c @@ -196,8 +196,18 @@ static void hisi_spi_flush_fifo(struct hisi_spi *hs) unsigned long limit = loops_per_jiffy << 1; do { - while (hisi_spi_rx_not_empty(hs)) + unsigned long inner_limit = loops_per_jiffy; + + while (hisi_spi_rx_not_empty(hs) && --inner_limit) { readl(hs->regs + HISI_SPI_DOUT); + cpu_relax(); + } + + if (!inner_limit) { + dev_warn_ratelimited(hs->dev, "RX FIFO flush timeout\n"); + break; + } + } while (hisi_spi_busy(hs) && limit--); } -- 2.53.0