From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2B47A34041C; Wed, 20 May 2026 16:48:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779295683; cv=none; b=cii8Vcu/RHM82BTvAFh4/bVnWUTn3lABr8n/SYKi89lP4XFmCSCGoU3WFzV5f9bEOfP8hO+zcbigjsCwNM8V/7v2rvOklQhvJEwKPcABN3FMHp7LLLAygxXw6us+zxmu8iaisQhPuTRfbJeGRkwKk65v3Wcqm76JIY84U9fFWeo= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779295683; c=relaxed/simple; bh=JTP/+OZ6BmUVkn56hTndvYsna4Qdz+TqcbfwcRfOBVs=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=fK5jz40Zvu0PrAGzdyYyN5RkCZGVEMVM13vIoCu2x2382Ov2KBMAMV5SAzF4EKe2qCf8Z1ZkcZuX4wRqV/ZoUhZwZYYOGLXOEq6pvM57AZsPdE8Coo+qnSvlvyJZdqjFsjjohYdnaLktukMHYgHlHtW4rX1q+OnFlMp/92kvHtk= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=b/B6EfKs; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="b/B6EfKs" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7BCE91F000E9; Wed, 20 May 2026 16:48:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linuxfoundation.org; s=korg; t=1779295682; bh=PX/UXr9MgHqMbxbYsQeJaVvdlSxym0WgukytLFzQUSA=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=b/B6EfKsSkkJNXBFyy4v60v3ZsEiyLA+7T9XLoHxxpk2Uh92ow8dTfQKQlv47hCtZ 7bUiW8W3sFI7mPHeZt40PruacyJBPjFVg0TFdyE20Bg0gxLExz/rRCedDRBA0k61l3 L19KvHJbPmeExcvgCw7MXdpCs7pzY/x/jFe8oY0o= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Sherry Sun , Frank Li , Sasha Levin Subject: [PATCH 7.0 0475/1146] arm64: dts: imx8mp-evk: Enable pull select bit for PCIe regulator GPIO (M.2 W_DISABLE1) Date: Wed, 20 May 2026 18:12:05 +0200 Message-ID: <20260520162158.943513208@linuxfoundation.org> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260520162148.390695140@linuxfoundation.org> References: <20260520162148.390695140@linuxfoundation.org> User-Agent: quilt/0.69 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 7.0-stable review patch. If anyone has any objections, please let me know. ------------------ From: Sherry Sun [ Upstream commit d1e7eab6033f9885a02c4b4e8f09e34d8e9d21ab ] The current pin configuration for MX8MP_IOMUXC_SD1_DATA4__GPIO2_IO06 sets the weak pull-up but does not enable the pull select field. Bit 8 in the IOMUX register must be set in order for the weak pull-up to actually take effect. Update the pinctrl setting from 0x40 to 0x140 to enable both the pull select and the weak pull-up, ensuring the line behaves as expected. Fixes: d50650500064 ("arm64: dts: imx8mp-evk: Add PCIe support") Signed-off-by: Sherry Sun Reviewed-by: Frank Li Signed-off-by: Frank Li Signed-off-by: Sasha Levin --- arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts index b256be710ea12..31f03436137dc 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts @@ -1064,7 +1064,7 @@ MX8MP_IOMUXC_SD1_DATA5__GPIO2_IO07 0x40 pinctrl_pcie0_reg: pcie0reggrp { fsl,pins = < - MX8MP_IOMUXC_SD1_DATA4__GPIO2_IO06 0x40 + MX8MP_IOMUXC_SD1_DATA4__GPIO2_IO06 0x140 >; }; -- 2.53.0