From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp-190b.mail.infomaniak.ch (smtp-190b.mail.infomaniak.ch [185.125.25.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9A6263FDBEC for ; Tue, 9 Jun 2026 10:58:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.125.25.11 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781002705; cv=none; b=jY9KufZiaatjnOG2Gm9+mV6Q1SB10yKbkFrqjTQ9/n5pULYPtRZELRpTNWJErZkHWeGEU8KoCTxIdVTcbZfZJZo5l7k877ngQV3P7c2ptEad3NRGRh8oExW+LNCuRc5resmDND/VEoeMFXt6jpTnmFUHxCEFJArBlkeV2ycFBCA= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781002705; c=relaxed/simple; bh=iEjA2MjKSCB7UYuBfpm7ZoN6u/xw2LXb42wJfvgR3/8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=gRSeX2Qlk+GC689cYDNhOUIck8NcUAo2FhaWHK+G3kstxrrv0GCoI8VYAa7jDrt2MFrHmEqxjDNOqHbXH6rB68I3bMVvNG4CxH9nKLaCVNckMo6gKr6fgIVca1Kzwc5ZgIqK7R2rTHJeskHRd9GlfGKnyinfyvbZ4laaeXZLoS4= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=gibson.sh; spf=pass smtp.mailfrom=gibson.sh; dkim=pass (2048-bit key) header.d=gibson.sh header.i=@gibson.sh header.b=SEvnMshB; arc=none smtp.client-ip=185.125.25.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=gibson.sh Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gibson.sh Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gibson.sh header.i=@gibson.sh header.b="SEvnMshB" Received: from smtp-4-0001.mail.infomaniak.ch (smtp-4-0001.mail.infomaniak.ch [10.7.10.108]) by smtp-4-3000.mail.infomaniak.ch (Postfix) with ESMTPS id 4gZQqr0t9rzNRr for ; Tue, 9 Jun 2026 12:58:16 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gibson.sh; s=20260228; t=1781002695; bh=Mx0oPR9bcP29fTc5WI0tJYSbBL/td4L1Mh46SbEbR5Q=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=SEvnMshBF8N0sLT+Dg8/4BeOT3C/sPk70JDw1y9AZqyjzc5qhRHFZPQVWmU9/HStx meIuv4o8K1c3tOK9TmfH4xqaC3CZV83/Enyo8/uYUHBigkLgid0C/ApCQ1okMNm8qI j/TRP7DeneIEH3eh2O5T3WOt4hlfRWAZfJPmslvWexQ9pIDnJyhYcNoP8UXIlYNG59 9DcatxErNJbQh6FhnBjKQ0+Eadh3072MIconC3rp5KMy/b41Qa5y0CqMt+T3XsO+yW nwjpuQSY8Pk1+XOmDYFVifnBxasRRq9B8SH5SsplCfDoE2Il5cjPT0nJDb4J+CNrh6 hLxjtO/G8+dfA== Received: from unknown by smtp-4-0001.mail.infomaniak.ch (Postfix) with ESMTPA id 4gZQqq4q87zHdc for ; Tue, 9 Jun 2026 12:58:15 +0200 (CEST) Received: from unknown by spiderdemon.horst.lan (DragonFly Mail Agent v0.13); Tue, 09 Jun 2026 12:58:14 +0200 From: Daniel Gibson To: Shyam Sundar S K , Hans de Goede , =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= , platform-driver-x86@vger.kernel.org, linux-kernel@vger.kernel.org, Mario Limonciello Cc: Daniel Gibson , stable@vger.kernel.org Subject: [PATCH v5 1/4] platform/x86/amd/pmc: Check for intermediate wakeup in function Date: Tue, 9 Jun 2026 12:57:53 +0200 Message-ID: <20260609105756.2813669-2-daniel@gibson.sh> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20260609105756.2813669-1-daniel@gibson.sh> References: <20260609105756.2813669-1-daniel@gibson.sh> Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Infomaniak-Routing: alpha Refactor code introduced by commit 9f5595d5f03f ("pmc: Require at least 2.5 seconds between HW sleep cycles") to allow adding different conditions for that delay in an upcoming change. Signed-off-by: Daniel Gibson Cc: stable@vger.kernel.org --- drivers/platform/x86/amd/pmc/pmc.c | 17 ++++++++++++++--- 1 file changed, 14 insertions(+), 3 deletions(-) diff --git a/drivers/platform/x86/amd/pmc/pmc.c b/drivers/platform/x86/amd/pmc/pmc.c index cae3fcafd4d7..2b9e5730170a 100644 --- a/drivers/platform/x86/amd/pmc/pmc.c +++ b/drivers/platform/x86/amd/pmc/pmc.c @@ -598,6 +598,19 @@ static int amd_pmc_verify_czn_rtc(struct amd_pmc_dev *pdev, u32 *arg) return rc; } +static bool amd_pmc_intermediate_wakeup_need_delay(struct amd_pmc_dev *pdev) +{ + /* + * Starting a new HW sleep cycle right after waking from one + * can cause electrical problems triggering the over voltage protection. + * That is avoided by delaying the next suspend a bit, see also + * https://lore.kernel.org/all/20250414162446.3853194-1-superm1@kernel.org/ + */ + struct smu_metrics table; + + return get_metrics_table(pdev, &table) == 0 && table.s0i3_last_entry_status; +} + static void amd_pmc_s2idle_prepare(void) { struct amd_pmc_dev *pdev = &pmc; @@ -632,11 +645,9 @@ static void amd_pmc_s2idle_prepare(void) static void amd_pmc_s2idle_check(void) { struct amd_pmc_dev *pdev = &pmc; - struct smu_metrics table; int rc; - /* Avoid triggering OVP */ - if (!get_metrics_table(pdev, &table) && table.s0i3_last_entry_status) + if (amd_pmc_intermediate_wakeup_need_delay(pdev)) msleep(2500); /* Dump the IdleMask before we add to the STB */ -- 2.48.1