From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7DECD3B1025 for ; Thu, 23 Jul 2026 18:28:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784831304; cv=none; b=fSqbke8BoWQ/I9YBc3xRtdBoZ5CaQyBbNLj1wpj4J2GMQR9bRYcFQA5ivWNquRYQQtjHaq6Ek/DkXL3umbzOBKf85mHvKXfT8UUdIyuenrovbr4TvOn1NCszJo6pdblWKM0rmcGet1rpbPlMMGyhMGsFcwgDfQ+XEYCl7brd6Es= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784831304; c=relaxed/simple; bh=mrPM2XMvCM0B3qQsw82Vk+QbV9RQripy/rGVgy48Tgo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=nDpct4/o9aZ/fEnaYtUr0cRbHAq3DLJdt0a10wHZUjnJ7sgFIAsmyTON/uPKZYgzJegE50WHPd67eQgxKn1kuLe3THEDmAQw5kpWofcl/K79Q/Lr6QvFeNHiMyqZQ9zT6GMxmylzGvc5vbQVI9ZI5MWtleokU4lUyeY/wa0LmYQ= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=nHtMlU2g; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="nHtMlU2g" Received: by smtp.kernel.org (Postfix) with ESMTPSA id DF73D1F000E9; Thu, 23 Jul 2026 18:28:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1784831288; bh=buosKtuEn/+iYCZPcNVQ6G/jAvCzmHU5p+GtXUQ/HMA=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=nHtMlU2g6s9KRNuR5WefOjVd0OaISjWjH1njHj9OdC2vG87Ou5gVgXbSChg+eu95t U6BTwfpDl47vnN0FQ+jFemUk4MQ5mHd9vE1R1pvVQ5pEfcfa9LAVSew69zRQR8v5En OdMKU/szh+57GowcGiNc8IqZhvJAB4L/fJkcXOViReVxlyoG2XxP0PrHryJT8CTgpV vojd8zjDAjsm2uG7dyw+FdxFZEqV9WEPx2YInCqCF8g1xo3+yuIOCpY4yJtHUgGDyb XK95c/tkCPlUnXxFDzpsVfTqYyoOVS2odjRf/v0MsAxTb4xZq/I4uBBqV+++tzZFDw ZOCrBB/r7FvBw== From: Sasha Levin To: stable@vger.kernel.org Cc: Terry Bowman , Kuppuswamy Sathyanarayanan , Jonathan Cameron , Dave Jiang , Joshua Hahn , Dan Williams , Sasha Levin Subject: [PATCH 6.18.y 1/4] cxl/pci: Remove unnecessary CXL Endpoint handling helper functions Date: Thu, 23 Jul 2026 14:28:03 -0400 Message-ID: <20260723182806.3493205-1-sashal@kernel.org> X-Mailer: git-send-email 2.53.0 In-Reply-To: <2026072028-shaky-author-b5df@gregkh> References: <2026072028-shaky-author-b5df@gregkh> Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Terry Bowman [ Upstream commit ca3d1a53e62093d17436abd447463da9c0f4e56b ] The CXL driver's cxl_handle_endpoint_cor_ras()/cxl_handle_endpoint_ras() are unnecessary helper functions used only for Endpoints. Remove these functions as they are not common for all CXL devices and do not provide value for EP handling. Rename __cxl_handle_ras to cxl_handle_ras() and __cxl_handle_cor_ras() to cxl_handle_cor_ras(). Signed-off-by: Terry Bowman Reviewed-by: Kuppuswamy Sathyanarayanan Reviewed-by: Jonathan Cameron Reviewed-by: Dave Jiang Tested-by: Joshua Hahn Reviewed-by: Dan Williams Link: https://patch.msgid.link/20260114182055.46029-5-terry.bowman@amd.com Signed-off-by: Dan Williams Signed-off-by: Dave Jiang Stable-dep-of: c268f949e219 ("cxl: Fix CXL_HEADERLOG_SIZE to match RAS Capability size") Signed-off-by: Sasha Levin --- drivers/cxl/core/pci.c | 26 ++++++++------------------ 1 file changed, 8 insertions(+), 18 deletions(-) diff --git a/drivers/cxl/core/pci.c b/drivers/cxl/core/pci.c index 18825e1505d6ad..078e9e5651e1bc 100644 --- a/drivers/cxl/core/pci.c +++ b/drivers/cxl/core/pci.c @@ -711,8 +711,8 @@ void read_cdat_data(struct cxl_port *port) } EXPORT_SYMBOL_NS_GPL(read_cdat_data, "CXL"); -static void __cxl_handle_cor_ras(struct cxl_dev_state *cxlds, - void __iomem *ras_base) +static void cxl_handle_cor_ras(struct cxl_dev_state *cxlds, + void __iomem *ras_base) { void __iomem *addr; u32 status; @@ -728,11 +728,6 @@ static void __cxl_handle_cor_ras(struct cxl_dev_state *cxlds, } } -static void cxl_handle_endpoint_cor_ras(struct cxl_dev_state *cxlds) -{ - return __cxl_handle_cor_ras(cxlds, cxlds->regs.ras); -} - /* CXL spec rev3.0 8.2.4.16.1 */ static void header_log_copy(void __iomem *ras_base, u32 *log) { @@ -754,8 +749,8 @@ static void header_log_copy(void __iomem *ras_base, u32 *log) * Log the state of the RAS status registers and prepare them to log the * next error status. Return 1 if reset needed. */ -static bool __cxl_handle_ras(struct cxl_dev_state *cxlds, - void __iomem *ras_base) +static bool cxl_handle_ras(struct cxl_dev_state *cxlds, + void __iomem *ras_base) { u32 hl[CXL_HEADERLOG_SIZE_U32]; void __iomem *addr; @@ -788,11 +783,6 @@ static bool __cxl_handle_ras(struct cxl_dev_state *cxlds, return true; } -static bool cxl_handle_endpoint_ras(struct cxl_dev_state *cxlds) -{ - return __cxl_handle_ras(cxlds, cxlds->regs.ras); -} - #ifdef CONFIG_PCIEAER_CXL static void cxl_dport_map_rch_aer(struct cxl_dport *dport) @@ -871,13 +861,13 @@ EXPORT_SYMBOL_NS_GPL(cxl_dport_init_ras_reporting, "CXL"); static void cxl_handle_rdport_cor_ras(struct cxl_dev_state *cxlds, struct cxl_dport *dport) { - return __cxl_handle_cor_ras(cxlds, dport->regs.ras); + return cxl_handle_cor_ras(cxlds, dport->regs.ras); } static bool cxl_handle_rdport_ras(struct cxl_dev_state *cxlds, struct cxl_dport *dport) { - return __cxl_handle_ras(cxlds, dport->regs.ras); + return cxl_handle_ras(cxlds, dport->regs.ras); } /* @@ -974,7 +964,7 @@ void cxl_cor_error_detected(struct pci_dev *pdev) if (cxlds->rcd) cxl_handle_rdport_errors(cxlds); - cxl_handle_endpoint_cor_ras(cxlds); + cxl_handle_cor_ras(cxlds, cxlds->regs.ras); } } EXPORT_SYMBOL_NS_GPL(cxl_cor_error_detected, "CXL"); @@ -1003,7 +993,7 @@ pci_ers_result_t cxl_error_detected(struct pci_dev *pdev, * chance the situation is recoverable dump the status of the RAS * capability registers and bounce the active state of the memdev. */ - ue = cxl_handle_endpoint_ras(cxlds); + ue = cxl_handle_ras(cxlds, cxlds->regs.ras); } -- 2.53.0