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[14.13.71.96]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-38fb30dff2esm4078462a91.13.2026.08.03.07.19.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Aug 2026 07:19:20 -0700 (PDT) From: Akari Tsuyukusa To: Michael Turquette , Stephen Boyd , Brian Masney , Matthias Brugger , AngeloGioacchino Del Regno , Yassine Oudjana , Richard Cochran Cc: Laura Nao , =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= , Chen-Yu Tsai , Akari Tsuyukusa , Bartosz Golaszewski , Danilo Krummrich , Bjorn Helgaas , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig=20=28The=20Capable=20Hub=29?= , Nicolas Frattaroli , Takashi Sakamoto , Haotian Zhang , Kees Cook , Miles Chen , Daniel Golle , Sam Shih , linux-clk@vger.kernel.org (open list:COMMON CLK FRAMEWORK), linux-kernel@vger.kernel.org (open list), linux-arm-kernel@lists.infradead.org (moderated list:ARM/Mediatek SoC support), linux-mediatek@lists.infradead.org (moderated list:ARM/Mediatek SoC support), netdev@vger.kernel.org (open list:PTP HARDWARE CLOCK SUPPORT:Keyword:(?:\b|_)ptp(?:\b|_)), stable@vger.kernel.org Subject: [PATCH 25/32] clk: mediatek: mt8173-infracfg: Switch to common probe/remove helpers Date: Mon, 3 Aug 2026 23:16:52 +0900 Message-ID: <20260803141659.559129-26-akkun11.open@gmail.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260803141659.559129-1-akkun11.open@gmail.com> References: <20260803141659.559129-1-akkun11.open@gmail.com> Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The MT8173 infracfg driver can use the MediaTek clock framework common initialization sequence. Reduce boilerplate code by creating struct mtk_clk_desc and using the mtk_clk_simple_probe/remove helpers. Drop the CLK_OF_DECLARE_DRIVER early init for infracfg; the kernel's deferred probe mechanism ensures dependent drivers like cpufreq are initialized correctly. Signed-off-by: Akari Tsuyukusa --- drivers/clk/mediatek/clk-mt8173-infracfg.c | 100 ++++----------------- 1 file changed, 16 insertions(+), 84 deletions(-) diff --git a/drivers/clk/mediatek/clk-mt8173-infracfg.c b/drivers/clk/mediatek/clk-mt8173-infracfg.c index 9b8c35897789..fdd994736e83 100644 --- a/drivers/clk/mediatek/clk-mt8173-infracfg.c +++ b/drivers/clk/mediatek/clk-mt8173-infracfg.c @@ -17,22 +17,20 @@ GATE_MTK(_id, _name, _parent, &infra_cg_regs, \ _shift, &mtk_clk_gate_ops_setclr) -static struct clk_hw_onecell_data *infra_clk_data; - static const struct mtk_gate_regs infra_cg_regs = { .set_ofs = 0x0040, .clr_ofs = 0x0044, .sta_ofs = 0x0048, }; -static const char * const ca53_parents[] __initconst = { +static const char * const ca53_parents[] = { "clk26m", "armca7pll", "mainpll", "univpll" }; -static const char * const ca72_parents[] __initconst = { +static const char * const ca72_parents[] = { "clk26m", "armca15pll", "mainpll", @@ -44,7 +42,7 @@ static const struct mtk_composite cpu_muxes[] = { MUX(CLK_INFRA_CA72SEL, "infra_ca72_sel", ca72_parents, 0x0000, 2, 2), }; -static const struct mtk_fixed_factor infra_early_divs[] = { +static const struct mtk_fixed_factor infra_divs[] = { FACTOR(CLK_INFRA_CLK_13M, "clk13m", "clk26m", 1, 2), }; @@ -70,95 +68,29 @@ static const struct mtk_clk_rst_desc clk_rst_desc = { .rst_bank_nr = ARRAY_SIZE(infrasys_rst_ofs), }; +static const struct mtk_clk_desc infracfg_desc = { + .clks = infra_gates, + .num_clks = ARRAY_SIZE(infra_gates), + .factor_clks = infra_divs, + .num_factor_clks = ARRAY_SIZE(infra_divs), + .cpumuxes = cpu_muxes, + .num_cpumuxes = ARRAY_SIZE(cpu_muxes), + .rst_desc = &clk_rst_desc, +}; + static const struct of_device_id of_match_clk_mt8173_infracfg[] = { - { .compatible = "mediatek,mt8173-infracfg" }, + { .compatible = "mediatek,mt8173-infracfg", .data = &infracfg_desc }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, of_match_clk_mt8173_infracfg); -static void clk_mt8173_infra_init_early(struct device_node *node) -{ - int i; - - infra_clk_data = mtk_alloc_clk_data(CLK_INFRA_NR_CLK); - if (!infra_clk_data) - return; - - for (i = 0; i < CLK_INFRA_NR_CLK; i++) - infra_clk_data->hws[i] = ERR_PTR(-EPROBE_DEFER); - - mtk_clk_register_factors(infra_early_divs, - ARRAY_SIZE(infra_early_divs), infra_clk_data); - - of_clk_add_hw_provider(node, of_clk_hw_onecell_get, infra_clk_data); -} -CLK_OF_DECLARE_DRIVER(mtk_infrasys, "mediatek,mt8173-infracfg", - clk_mt8173_infra_init_early); - -static int clk_mt8173_infracfg_probe(struct platform_device *pdev) -{ - struct device_node *node = pdev->dev.of_node; - int r, i; - - if (!infra_clk_data) { - infra_clk_data = mtk_alloc_clk_data(CLK_INFRA_NR_CLK); - if (!infra_clk_data) - return -ENOMEM; - } else { - for (i = 0; i < CLK_INFRA_NR_CLK; i++) - if (infra_clk_data->hws[i] == ERR_PTR(-EPROBE_DEFER)) - infra_clk_data->hws[i] = ERR_PTR(-ENOENT); - } - - r = mtk_clk_register_gates(&pdev->dev, node, infra_gates, - ARRAY_SIZE(infra_gates), infra_clk_data); - if (r) - return r; - - r = mtk_clk_register_cpumuxes(&pdev->dev, node, cpu_muxes, - ARRAY_SIZE(cpu_muxes), infra_clk_data); - if (r) - goto unregister_gates; - - r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, infra_clk_data); - if (r) - goto unregister_cpumuxes; - - r = mtk_register_reset_controller_with_dev(&pdev->dev, &clk_rst_desc); - if (r) - goto unregister_clk_hw; - - platform_set_drvdata(pdev, infra_clk_data); - - return 0; - -unregister_clk_hw: - of_clk_del_provider(node); -unregister_cpumuxes: - mtk_clk_unregister_cpumuxes(cpu_muxes, ARRAY_SIZE(cpu_muxes), infra_clk_data); -unregister_gates: - mtk_clk_unregister_gates(infra_gates, ARRAY_SIZE(infra_gates), infra_clk_data); - return r; -} - -static void clk_mt8173_infracfg_remove(struct platform_device *pdev) -{ - struct device_node *node = pdev->dev.of_node; - struct clk_hw_onecell_data *clk_data = platform_get_drvdata(pdev); - - of_clk_del_provider(node); - mtk_clk_unregister_cpumuxes(cpu_muxes, ARRAY_SIZE(cpu_muxes), clk_data); - mtk_clk_unregister_gates(infra_gates, ARRAY_SIZE(infra_gates), clk_data); - mtk_free_clk_data(clk_data); -} - static struct platform_driver clk_mt8173_infracfg_drv = { .driver = { .name = "clk-mt8173-infracfg", .of_match_table = of_match_clk_mt8173_infracfg, }, - .probe = clk_mt8173_infracfg_probe, - .remove = clk_mt8173_infracfg_remove, + .probe = mtk_clk_simple_probe, + .remove = mtk_clk_simple_remove, }; module_platform_driver(clk_mt8173_infracfg_drv); -- 2.55.0