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From: Ashutosh Dixit <ashutosh.dixit@intel.com>
To: stable@vger.kernel.org
Cc: Sasha Levin <sashal@kernel.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Subject: [PATCH 7.1.y 8/8] drm/xe/rtp: Ensure locking/ref counting for OA whitelists
Date: Mon,  3 Aug 2026 16:01:36 -0700	[thread overview]
Message-ID: <20260803230136.3270230-9-ashutosh.dixit@intel.com> (raw)
In-Reply-To: <20260803230136.3270230-1-ashutosh.dixit@intel.com>

[ Upstream commit 645f1a2589bd4782e25490e5ecc05b7043c36cbf ]

Since multiple OA streams might be open in parallel on a gt, ensure that
proper locking is in place. Also ensure that OA registers are whitelisted
when the first OA stream is open and de-whitelisted after the last OA
stream is closed.

Fixes: 828a8eaf37c3 ("drm/xe/oa: Add MMIO trigger support")
Cc: stable@vger.kernel.org # v6.12+
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Link: https://patch.msgid.link/20260615224227.34880-10-ashutosh.dixit@intel.com
---
 drivers/gpu/drm/xe/xe_oa_types.h      | 3 +++
 drivers/gpu/drm/xe/xe_reg_whitelist.c | 9 +++++++++
 2 files changed, 12 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_oa_types.h b/drivers/gpu/drm/xe/xe_oa_types.h
index b03ffd5134834..c0ddfae755b6a 100644
--- a/drivers/gpu/drm/xe/xe_oa_types.h
+++ b/drivers/gpu/drm/xe/xe_oa_types.h
@@ -126,6 +126,9 @@ struct xe_oa_gt {
 
 	/** @oa_unit: array of oa_units */
 	struct xe_oa_unit *oa_unit;
+
+	/** @whitelist_count: number of open streams for which oa registers are whitelisted */
+	u32 whitelist_count;
 };
 
 /**
diff --git a/drivers/gpu/drm/xe/xe_reg_whitelist.c b/drivers/gpu/drm/xe/xe_reg_whitelist.c
index 2ecf273c5f401..dad47988bdf6d 100644
--- a/drivers/gpu/drm/xe/xe_reg_whitelist.c
+++ b/drivers/gpu/drm/xe/xe_reg_whitelist.c
@@ -242,6 +242,10 @@ void xe_reg_whitelist_oa_regs(struct xe_gt *gt)
 	struct xe_hw_engine *hwe;
 	enum xe_hw_engine_id id;
 
+	lockdep_assert_held(&gt->oa.gt_lock);
+	if (gt->oa.whitelist_count++)
+		return;
+
 	for_each_hw_engine(hwe, gt, id)
 		__whitelist_oa_regs(hwe, true);
 }
@@ -257,6 +261,11 @@ void xe_reg_dewhitelist_oa_regs(struct xe_gt *gt)
 	struct xe_hw_engine *hwe;
 	enum xe_hw_engine_id id;
 
+	lockdep_assert_held(&gt->oa.gt_lock);
+	xe_assert(gt_to_xe(gt), gt->oa.whitelist_count);
+	if (--gt->oa.whitelist_count)
+		return;
+
 	for_each_hw_engine(hwe, gt, id)
 		__whitelist_oa_regs(hwe, false);
 }
-- 
2.54.0


  parent reply	other threads:[~2026-08-03 23:01 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-03 23:01 [PATCH 7.1.y 0/8] drivers/gpu/drm/xe: Don't whitelist OA registers unconditionally Ashutosh Dixit
2026-08-03 23:01 ` [PATCH 7.1.y 1/8] drm/xe/rtp: Maintain OA whitelists separately Ashutosh Dixit
2026-08-03 23:01 ` [PATCH 7.1.y 2/8] drm/xe/rtp: Keep track of non-OA nonpriv slots Ashutosh Dixit
2026-08-03 23:01 ` [PATCH 7.1.y 3/8] drm/xe/rtp: Generalize whitelist_apply_to_hwe Ashutosh Dixit
2026-08-03 23:01 ` [PATCH 7.1.y 4/8] drm/xe/rtp: Save OA nonpriv registers to register save/restore lists Ashutosh Dixit
2026-08-03 23:01 ` [PATCH 7.1.y 5/8] drm/xe/rtp: Toggle 'deny' bit to (de-)whitelist OA regs Ashutosh Dixit
2026-08-03 23:01 ` [PATCH 7.1.y 6/8] drm/xe/rtp: (De-)whitelist OA registers for all hwe's for a gt Ashutosh Dixit
2026-08-03 23:01 ` [PATCH 7.1.y 7/8] drm/xe/oa: (De-)whitelist OA registers on OA stream open/release Ashutosh Dixit
2026-08-03 23:01 ` Ashutosh Dixit [this message]
2026-08-05  1:13 ` [PATCH 7.1.y 0/8] drivers/gpu/drm/xe: Don't whitelist OA registers unconditionally Sasha Levin
2026-08-05  2:53   ` Dixit, Ashutosh

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